From 9c901225f8f18d0d2f5325436983d685a4fe2245 Mon Sep 17 00:00:00 2001
From: Lisa Hsu <hsul@eecs.umich.edu>
Date: Fri, 6 Oct 2006 01:27:02 -0400
Subject: there are two main thrusts of this changeset.
1) return the periodicity of checkpoints back into the code (i.e. make m5 checkpoint n m meaningful again).
2) to do this, i had to much around with being able to repeatedly schedule and SimLoopExitEvent, which led to changes in how exit simloop events are handled to make this easier.
src/arch/alpha/isa/decoder.isa:
src/mem/cache/cache_impl.hh:
modify arg. order for new calling convention of exitSimLoop.
src/cpu/base.cc:
src/sim/main.cc:
src/sim/pseudo_inst.cc:
src/sim/root.cc:
now, instead of creating a new SimLoopExitEvent, call a wrapper schedExitSimLoop which handles all the default args.
src/sim/sim_events.cc:
src/sim/sim_events.hh:
src/sim/sim_exit.hh:
add the periodicity of checkpointing back into the code.
to facilitate this, there are now two wrappers (instead of just overloading exitSimLoop). exitSimLoop is only for exiting NOW (i.e. at curTick), while schedExitSimLoop schedules and exit event for the future.
--HG--
extra : convert_revision : c61f4bf05517172edd2c83368fd10bb0f0678029
---
src/cpu/base.cc | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
(limited to 'src/cpu')
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 513dd7c55..ea4b03bf2 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -41,6 +41,7 @@
#include "cpu/cpuevent.hh"
#include "cpu/thread_context.hh"
#include "cpu/profile.hh"
+#include "sim/sim_exit.hh"
#include "sim/param.hh"
#include "sim/process.hh"
#include "sim/sim_events.hh"
@@ -125,8 +126,9 @@ BaseCPU::BaseCPU(Params *p)
//
if (p->max_insts_any_thread != 0)
for (int i = 0; i < number_of_threads; ++i)
- new SimLoopExitEvent(comInstEventQueue[i], p->max_insts_any_thread,
- "a thread reached the max instruction count");
+ schedExitSimLoop("a thread reached the max instruction count",
+ p->max_insts_any_thread, 0,
+ comInstEventQueue[i]);
if (p->max_insts_all_threads != 0) {
// allocate & initialize shared downcounter: each event will
@@ -150,8 +152,9 @@ BaseCPU::BaseCPU(Params *p)
//
if (p->max_loads_any_thread != 0)
for (int i = 0; i < number_of_threads; ++i)
- new SimLoopExitEvent(comLoadEventQueue[i], p->max_loads_any_thread,
- "a thread reached the max load count");
+ schedExitSimLoop("a thread reached the max load count",
+ p->max_loads_any_thread, 0,
+ comLoadEventQueue[i]);
if (p->max_loads_all_threads != 0) {
// allocate & initialize shared downcounter: each event will
--
cgit v1.2.3
From fb3a30f87cb699d9a39240d52d1dba3feb0b64c3 Mon Sep 17 00:00:00 2001
From: Lisa Hsu <hsul@eecs.umich.edu>
Date: Fri, 6 Oct 2006 01:29:50 -0400
Subject: checkpoint recovery was screwed up because a new section was created
in the middle of another section and messed up unserializing.
--HG--
extra : convert_revision : 7af15fdc9e8d203b26840a2eb5fef511b6a2b21d
---
src/cpu/simple/atomic.cc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
(limited to 'src/cpu')
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 7ba1b7df1..88698bfee 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -161,9 +161,9 @@ AtomicSimpleCPU::serialize(ostream &os)
{
SimObject::State so_state = SimObject::getState();
SERIALIZE_ENUM(so_state);
+ BaseSimpleCPU::serialize(os);
nameOut(os, csprintf("%s.tickEvent", name()));
tickEvent.serialize(os);
- BaseSimpleCPU::serialize(os);
}
void
@@ -171,8 +171,8 @@ AtomicSimpleCPU::unserialize(Checkpoint *cp, const string §ion)
{
SimObject::State so_state;
UNSERIALIZE_ENUM(so_state);
- tickEvent.unserialize(cp, csprintf("%s.tickEvent", section));
BaseSimpleCPU::unserialize(cp, section);
+ tickEvent.unserialize(cp, csprintf("%s.tickEvent", section));
}
void
--
cgit v1.2.3