From da6a7b1263cf624790f06a5f944366fb113dffc8 Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Fri, 26 May 2006 13:48:35 -0400 Subject: Add names to memory Port objects for tracing. --HG-- extra : convert_revision : ddf30084e343e8656e4812ab20356292b35507ee --- src/cpu/cpu_exec_context.cc | 12 ++++++++---- src/cpu/simple/atomic.cc | 2 +- src/cpu/simple/atomic.hh | 4 ++-- src/cpu/simple/timing.hh | 8 ++++---- 4 files changed, 15 insertions(+), 11 deletions(-) (limited to 'src/cpu') diff --git a/src/cpu/cpu_exec_context.cc b/src/cpu/cpu_exec_context.cc index ec1e94561..b8aa9a67e 100644 --- a/src/cpu/cpu_exec_context.cc +++ b/src/cpu/cpu_exec_context.cc @@ -80,12 +80,14 @@ CPUExecContext::CPUExecContext(BaseCPU *_cpu, int _thread_num, System *_sys, profilePC = 3; Port *mem_port; - physPort = new FunctionalPort(); + physPort = new FunctionalPort(csprintf("%s-%d-funcport", + cpu->name(), thread_num)); mem_port = system->physmem->getPort("functional"); mem_port->setPeer(physPort); physPort->setPeer(mem_port); - virtPort = new VirtualPort(); + virtPort = new VirtualPort(csprintf("%s-%d-vport", + cpu->name(), thread_num)); mem_port = system->physmem->getPort("functional"); mem_port->setPeer(virtPort); virtPort->setPeer(mem_port); @@ -100,7 +102,9 @@ CPUExecContext::CPUExecContext(BaseCPU *_cpu, int _thread_num, { /* Use this port to for syscall emulation writes to memory. */ Port *mem_port; - port = new TranslatingPort(process->pTable, false); + port = new TranslatingPort(csprintf("%s-%d-funcport", + cpu->name(), thread_num), + process->pTable, false); mem_port = memobj->getPort("functional"); mem_port->setPeer(port); port->setPeer(mem_port); @@ -300,7 +304,7 @@ CPUExecContext::getVirtPort(ExecContext *xc) VirtualPort *vp; Port *mem_port; - vp = new VirtualPort(xc); + vp = new VirtualPort("xc-vport", xc); mem_port = system->physmem->getPort("functional"); mem_port->setPeer(vp); vp->setPeer(mem_port); diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index e9422b9c0..04a84c92a 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -117,7 +117,7 @@ AtomicSimpleCPU::CpuPort::recvRetry() AtomicSimpleCPU::AtomicSimpleCPU(Params *p) : BaseSimpleCPU(p), tickEvent(this), width(p->width), simulate_stalls(p->simulate_stalls), - icachePort(this), dcachePort(this) + icachePort(name() + "-iport", this), dcachePort(name() + "-iport", this) { _status = Idle; diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh index d0ba085f0..ab3a3e8ef 100644 --- a/src/cpu/simple/atomic.hh +++ b/src/cpu/simple/atomic.hh @@ -84,8 +84,8 @@ class AtomicSimpleCPU : public BaseSimpleCPU public: - CpuPort(AtomicSimpleCPU *_cpu) - : cpu(_cpu) + CpuPort(const std::string &_name, AtomicSimpleCPU *_cpu) + : Port(_name), cpu(_cpu) { } protected: diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index 83be025d9..7f38e629a 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -71,8 +71,8 @@ class TimingSimpleCPU : public BaseSimpleCPU public: - CpuPort(TimingSimpleCPU *_cpu) - : cpu(_cpu) + CpuPort(const std::string &_name, TimingSimpleCPU *_cpu) + : Port(_name), cpu(_cpu) { } protected: @@ -93,7 +93,7 @@ class TimingSimpleCPU : public BaseSimpleCPU public: IcachePort(TimingSimpleCPU *_cpu) - : CpuPort(_cpu) + : CpuPort(_cpu->name() + "-iport", _cpu) { } protected: @@ -108,7 +108,7 @@ class TimingSimpleCPU : public BaseSimpleCPU public: DcachePort(TimingSimpleCPU *_cpu) - : CpuPort(_cpu) + : CpuPort(_cpu->name() + "-dport", _cpu) { } protected: -- cgit v1.2.3