From 6248e12704275bf4cc88f1743bb3a4bff7adcf9f Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Wed, 13 Aug 2008 17:41:58 -0400 Subject: Add the ability to specify a think time before descriptor fetch/writeback starts/ends as well as after read/write dmas --- src/dev/Ethernet.py | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/dev/Ethernet.py') diff --git a/src/dev/Ethernet.py b/src/dev/Ethernet.py index 2beb0d537..01384b32b 100644 --- a/src/dev/Ethernet.py +++ b/src/dev/Ethernet.py @@ -98,6 +98,13 @@ class IGbE(EtherDevice): InterruptLine = 0x1e InterruptPin = 0x01 BAR0Size = '128kB' + wb_delay = Param.Latency('10ns', "delay before desc writeback occurs") + fetch_delay = Param.Latency('10ns', "delay before desc fetch occurs") + fetch_comp_delay = Param.Latency('10ns', "delay after desc fetch occurs") + wb_comp_delay = Param.Latency('10ns', "delay after desc wb occurs") + tx_read_delay = Param.Latency('0ns', "delay after tx dma read") + rx_write_delay = Param.Latency('0ns', "delay after rx dma read") + class EtherDevBase(EtherDevice): type = 'EtherDevBase' -- cgit v1.2.3 From 886c5f8fe5011bf9a610d2bc3cb3bb010c592510 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Thu, 9 Oct 2008 04:58:23 -0700 Subject: SINIC: Commit old code from ASPLOS 2006 studies. NOTE: This code was written by Nathan Binkert in 2006 and is properly copyright "The Regents of the University of Michigan" --- src/dev/Ethernet.py | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/dev/Ethernet.py') diff --git a/src/dev/Ethernet.py b/src/dev/Ethernet.py index 01384b32b..cf513b834 100644 --- a/src/dev/Ethernet.py +++ b/src/dev/Ethernet.py @@ -171,6 +171,9 @@ class Sinic(EtherDevBase): tx_fifo_high_mark = Param.MemorySize('384kB', "tx fifo high threshold") tx_fifo_threshold = Param.MemorySize('128kB', "tx fifo low threshold") virtual_count = Param.UInt32(1, "Virtualized SINIC") + zero_copy_size = Param.UInt32(64, "Bytes to copy if below threshold") + zero_copy_threshold = Param.UInt32(256, + "Only zero copy above this threshold") zero_copy = Param.Bool(False, "Zero copy receive") delay_copy = Param.Bool(False, "Delayed copy transmit") virtual_addr = Param.Bool(False, "Virtual addressing") -- cgit v1.2.3 From 94b08bed07d13106381a0bb692bf0d879c5353d4 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Thu, 9 Oct 2008 22:19:39 -0700 Subject: SimObjects: Clean up handling of C++ namespaces. Make them easier to express by only having the cxx_type parameter which has the full namespace name, and drop the cxx_namespace thing. Add support for multiple levels of namespace. --- src/dev/Ethernet.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/dev/Ethernet.py') diff --git a/src/dev/Ethernet.py b/src/dev/Ethernet.py index cf513b834..5821a3e96 100644 --- a/src/dev/Ethernet.py +++ b/src/dev/Ethernet.py @@ -160,8 +160,7 @@ class NSGigE(EtherDevBase): class Sinic(EtherDevBase): type = 'Sinic' - cxx_namespace = 'Sinic' - cxx_class = 'Device' + cxx_class = 'Sinic::Device' rx_max_copy = Param.MemorySize('1514B', "rx max copy") tx_max_copy = Param.MemorySize('16kB', "tx max copy") -- cgit v1.2.3 From dd788a23c972ec45248ad42e58eaa5141160cff9 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Fri, 5 Dec 2008 13:58:22 -0500 Subject: IGbE: Add support for newer 8257x based Intel NICs --- src/dev/Ethernet.py | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) (limited to 'src/dev/Ethernet.py') diff --git a/src/dev/Ethernet.py b/src/dev/Ethernet.py index 5821a3e96..670f48eac 100644 --- a/src/dev/Ethernet.py +++ b/src/dev/Ethernet.py @@ -67,7 +67,9 @@ class EtherDevice(PciDevice): interface = Port("Ethernet Interrface") class IGbE(EtherDevice): + # Base class for two IGbE adapters listed above type = 'IGbE' + #abstract = True hardware_address = Param.EthernetAddr(NextEthernetAddr, "Ethernet Hardware Address") use_flow_control = Param.Bool(False, @@ -80,7 +82,6 @@ class IGbE(EtherDevice): "Number of enteries in the rx descriptor cache") clock = Param.Clock('500MHz', "Clock speed of the device") VendorID = 0x8086 - DeviceID = 0x1075 SubsystemID = 0x1008 SubsystemVendorID = 0x8086 Status = 0x0000 @@ -104,7 +105,20 @@ class IGbE(EtherDevice): wb_comp_delay = Param.Latency('10ns', "delay after desc wb occurs") tx_read_delay = Param.Latency('0ns', "delay after tx dma read") rx_write_delay = Param.Latency('0ns', "delay after rx dma read") + is8257 = Param.Bool("Select between and 8254x and 8257x device") + + +class IGbE_e1000(IGbE): + # Older Intel 8254x based gigabit ethernet adapter + # Uses Intel e1000 driver + DeviceID = 0x1075 + is8257 = False +class IGbE_igb(IGbE): + # Newer Intel 8257x based gigabit ethernet adapter + # Uses Intel igb driver and in theory supports packet splitting and LRO + DeviceID = 0x10C9 + is8257 = True class EtherDevBase(EtherDevice): type = 'EtherDevBase' -- cgit v1.2.3 From 9f89d43b653061fe335cdb4c8dfac9b046d6416c Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Tue, 6 Jan 2009 10:36:55 -0500 Subject: IGbE: Remove is8257 variable --- src/dev/Ethernet.py | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'src/dev/Ethernet.py') diff --git a/src/dev/Ethernet.py b/src/dev/Ethernet.py index 670f48eac..d73d56d03 100644 --- a/src/dev/Ethernet.py +++ b/src/dev/Ethernet.py @@ -69,7 +69,6 @@ class EtherDevice(PciDevice): class IGbE(EtherDevice): # Base class for two IGbE adapters listed above type = 'IGbE' - #abstract = True hardware_address = Param.EthernetAddr(NextEthernetAddr, "Ethernet Hardware Address") use_flow_control = Param.Bool(False, @@ -105,20 +104,22 @@ class IGbE(EtherDevice): wb_comp_delay = Param.Latency('10ns', "delay after desc wb occurs") tx_read_delay = Param.Latency('0ns', "delay after tx dma read") rx_write_delay = Param.Latency('0ns', "delay after rx dma read") - is8257 = Param.Bool("Select between and 8254x and 8257x device") - + phy_pid = Param.UInt16("Phy PID that corresponds to device ID") + phy_epid = Param.UInt16("Phy EPID that corresponds to device ID") class IGbE_e1000(IGbE): # Older Intel 8254x based gigabit ethernet adapter # Uses Intel e1000 driver DeviceID = 0x1075 - is8257 = False + phy_pid = 0x02A8 + phy_epid = 0x0380 class IGbE_igb(IGbE): # Newer Intel 8257x based gigabit ethernet adapter # Uses Intel igb driver and in theory supports packet splitting and LRO DeviceID = 0x10C9 - is8257 = True + phy_pid = 0x0141 + phy_epid = 0x0CC0 class EtherDevBase(EtherDevice): type = 'EtherDevBase' -- cgit v1.2.3