From 1379e30a4d3f6089838679a49d2364ea7817668f Mon Sep 17 00:00:00 2001 From: Ciro Santilli Date: Thu, 30 Aug 2018 14:50:31 +0100 Subject: dev-arm: rename Pl390 to GicV2 The Pl390 model has evolved and acquired a lot of the features from GICv2, which means that the name is no longer appropriate. Rename it to GICv2 since this is more representative of the supported features. GICv2 is backwards compatible with the older Pl390, so we decided to simply rename the class to represent both GICv2 and older interfaces such as the instead of creating a new separate one. Change-Id: I1c05fba8b3cb5841c66480e9f05b8c873eba3229 Reviewed-by: Andreas Sandberg Reviewed-on: https://gem5-review.googlesource.com/12492 Maintainer: Andreas Sandberg --- src/dev/arm/RealView.py | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/dev/arm/RealView.py') diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py index d38b86775..1537e76b4 100644 --- a/src/dev/arm/RealView.py +++ b/src/dev/arm/RealView.py @@ -74,7 +74,7 @@ try: except ImportError: # KVM support wasn't compiled into gem5. Fallback to a # software-only GIC. - kvm_gicv2_class = Pl390 + kvm_gicv2_class = GicV2 pass class AmbaPioDevice(BasicPioDevice): @@ -614,7 +614,7 @@ class RealViewPBX(RealView): realview_io = RealViewCtrl(pio_addr=0x10000000) mcc = VExpressMCC() dcc = CoreTile2A15DCC() - gic = Pl390(cpu_addr=0x1f000100, dist_addr=0x1f001000, cpu_size=0x100) + gic = GicV2(cpu_addr=0x1f000100, dist_addr=0x1f001000, cpu_size=0x100) pci_host = GenericPciHost( conf_base=0x30000000, conf_size='256MB', conf_device_bits=16, pci_pio_base=0) @@ -874,7 +874,7 @@ class VExpress_EMM(RealView): dcc = CoreTile2A15DCC() ### On-chip devices ### - gic = Pl390(dist_addr=0x2C001000, cpu_addr=0x2C002000) + gic = GicV2(dist_addr=0x2C001000, cpu_addr=0x2C002000) vgic = VGic(vcpu_addr=0x2c006000, hv_addr=0x2c004000, ppint=25) local_cpu_timer = CpuLocalTimer(int_num_timer=29, int_num_watchdog=30, @@ -972,7 +972,7 @@ class VExpress_EMM(RealView): InterruptLine=2, InterruptPin=2) def enableMSIX(self): - self.gic = Pl390(dist_addr=0x2C001000, cpu_addr=0x2C002000, it_lines=512) + self.gic = GicV2(dist_addr=0x2C001000, cpu_addr=0x2C002000, it_lines=512) self.gicv2m = Gicv2m() self.gicv2m.frames = [Gicv2mFrame(spi_base=256, spi_len=64, addr=0x2C1C0000)] -- cgit v1.2.3