From 65f3f097d3c270d2f28fc7d55651afaefb56ceed Mon Sep 17 00:00:00 2001 From: Andreas Sandberg Date: Sat, 23 May 2015 13:46:52 +0100 Subject: dev, arm: Refactor and clean up the generic timer model This changeset cleans up the generic timer a bit and moves most of the register juggling from the ISA code into a separate class in the same source file as the rest of the generic timer. It also removes the assumption that there is always 8 or fewer CPUs in the system. Instead of having a fixed limit, we now instantiate per-core timers as they are requested. This is all in preparation for other patches that add support for virtual timers and a memory mapped interface. --- src/dev/arm/RealView.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/dev/arm/RealView.py') diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py index 9ff642cb1..2e58c8fa6 100644 --- a/src/dev/arm/RealView.py +++ b/src/dev/arm/RealView.py @@ -136,7 +136,7 @@ class GenericTimer(SimObject): cxx_header = "dev/arm/generic_timer.hh" system = Param.System(Parent.any, "system") gic = Param.BaseGic(Parent.any, "GIC to use for interrupting") - int_num = Param.UInt32("Interrupt number used per-cpu to GIC") + int_phys = Param.UInt32("Interrupt number used per-cpu to GIC") # @todo: for now only one timer per CPU is supported, which is the # normal behaviour when Security and Virt. extensions are disabled. @@ -457,7 +457,7 @@ class VExpress_EMM(RealView): idreg=0x02250000, pio_addr=0x1C010000) gic = Pl390(dist_addr=0x2C001000, cpu_addr=0x2C002000) local_cpu_timer = CpuLocalTimer(int_num_timer=29, int_num_watchdog=30, pio_addr=0x2C080000) - generic_timer = GenericTimer(int_num=29) + generic_timer = GenericTimer(int_phys=29) timer0 = Sp804(int_num0=34, int_num1=34, pio_addr=0x1C110000, clock0='1MHz', clock1='1MHz') timer1 = Sp804(int_num0=35, int_num1=35, pio_addr=0x1C120000, clock0='1MHz', clock1='1MHz') clcd = Pl111(pio_addr=0x1c1f0000, int_num=46) -- cgit v1.2.3