From bb0ab1d464ff875b44cfce57e3c01c7587b02727 Mon Sep 17 00:00:00 2001 From: Ciro Santilli Date: Tue, 4 Sep 2018 14:11:10 +0100 Subject: dev, arm: remove the RealViewEB platform This is an old platform, and we haven't had official Linux kernel configs for it in a while, so we've decided to deprecate it. Furthermore, trying to use it fails with: object 'RealViewEB' has no attribute 'pci_host' and the last commit in the class happened two years ago, which indicates that no one has been using it. Change-Id: Icc674b00b152eb3246e05141dbaf2624cc720f21 Reviewed-by: Andreas Sandberg Reviewed-on: https://gem5-review.googlesource.com/c/12471 Maintainer: Andreas Sandberg --- src/dev/arm/RealView.py | 114 ------------------------------------------------ 1 file changed, 114 deletions(-) (limited to 'src/dev/arm/RealView.py') diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py index 3f1803037..e129f3c95 100644 --- a/src/dev/arm/RealView.py +++ b/src/dev/arm/RealView.py @@ -741,120 +741,6 @@ class RealViewPBX(RealView): self.flash_fake.clk_domain = clkdomain self.energy_ctrl.clk_domain = clkdomain -# Reference for memory map and interrupt number -# RealView Emulation Baseboard User Guide (ARM DUI 0143B) -# Chapter 4: Programmer's Reference -class RealViewEB(RealView): - uart = Pl011(pio_addr=0x10009000, int_num=44) - realview_io = RealViewCtrl(pio_addr=0x10000000, idreg=0x01400500) - mcc = VExpressMCC() - dcc = CoreTile2A15DCC() - gic = GicV2(dist_addr=0x10041000, cpu_addr=0x10040000) - timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000) - timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000) - clcd = Pl111(pio_addr=0x10020000, int_num=23) - kmi0 = Pl050(pio_addr=0x10006000, int_num=20, ps2=PS2Keyboard()) - kmi1 = Pl050(pio_addr=0x10007000, int_num=21, ps2=PS2TouchKit()) - - l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff, warn_access="1") - flash_fake = IsaFake(pio_addr=0x40000000, pio_size=0x20000000-1, - fake_mem=True) - dmac_fake = AmbaFake(pio_addr=0x10030000) - uart1_fake = AmbaFake(pio_addr=0x1000a000) - uart2_fake = AmbaFake(pio_addr=0x1000b000) - uart3_fake = AmbaFake(pio_addr=0x1000c000) - smcreg_fake = IsaFake(pio_addr=0x10080000, pio_size=0x10000-1) - smc_fake = AmbaFake(pio_addr=0x100e1000) - sp810_fake = AmbaFake(pio_addr=0x10001000, ignore_access=True) - watchdog_fake = AmbaFake(pio_addr=0x10010000) - gpio0_fake = AmbaFake(pio_addr=0x10013000) - gpio1_fake = AmbaFake(pio_addr=0x10014000) - gpio2_fake = AmbaFake(pio_addr=0x10015000) - ssp_fake = AmbaFake(pio_addr=0x1000d000) - sci_fake = AmbaFake(pio_addr=0x1000e000) - aaci_fake = AmbaFake(pio_addr=0x10004000) - mmc_fake = AmbaFake(pio_addr=0x10005000) - rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031) - energy_ctrl = EnergyCtrl(pio_addr=0x1000f000) - - # Attach I/O devices that are on chip and also set the appropriate - # ranges for the bridge - def attachOnChipIO(self, bus, bridge): - self.gic.pio = bus.master - self.l2x0_fake.pio = bus.master - # Bridge ranges based on excluding what is part of on-chip I/O - # (gic, l2x0) - bridge.ranges = [AddrRange(self.realview_io.pio_addr, - self.gic.cpu_addr - 1), - AddrRange(self.flash_fake.pio_addr, Addr.max)] - - # Set the clock domain for IO objects that are considered - # to be "close" to the cores. - def onChipIOClkDomain(self, clkdomain): - self.gic.clk_domain = clkdomain - self.l2x0_fake.clk_domain = clkdomain - - # Attach I/O devices to specified bus object. Can't do this - # earlier, since the bus object itself is typically defined at the - # System level. - def attachIO(self, bus): - self.uart.pio = bus.master - self.realview_io.pio = bus.master - self.pci_host.pio = bus.master - self.timer0.pio = bus.master - self.timer1.pio = bus.master - self.clcd.pio = bus.master - self.clcd.dma = bus.slave - self.kmi0.pio = bus.master - self.kmi1.pio = bus.master - self.dmac_fake.pio = bus.master - self.uart1_fake.pio = bus.master - self.uart2_fake.pio = bus.master - self.uart3_fake.pio = bus.master - self.smc_fake.pio = bus.master - self.sp810_fake.pio = bus.master - self.watchdog_fake.pio = bus.master - self.gpio0_fake.pio = bus.master - self.gpio1_fake.pio = bus.master - self.gpio2_fake.pio = bus.master - self.ssp_fake.pio = bus.master - self.sci_fake.pio = bus.master - self.aaci_fake.pio = bus.master - self.mmc_fake.pio = bus.master - self.rtc_fake.pio = bus.master - self.flash_fake.pio = bus.master - self.smcreg_fake.pio = bus.master - self.energy_ctrl.pio = bus.master - - # Set the clock domain for IO objects that are considered - # to be "far" away from the cores. - def offChipIOClkDomain(self, clkdomain): - self.uart.clk_domain = clkdomain - self.realview_io.clk_domain = clkdomain - self.timer0.clk_domain = clkdomain - self.timer1.clk_domain = clkdomain - self.clcd.clk_domain = clkdomain - self.kmi0.clk_domain = clkdomain - self.kmi1.clk_domain = clkdomain - self.dmac_fake.clk_domain = clkdomain - self.uart1_fake.clk_domain = clkdomain - self.uart2_fake.clk_domain = clkdomain - self.uart3_fake.clk_domain = clkdomain - self.smc_fake.clk_domain = clkdomain - self.sp810_fake.clk_domain = clkdomain - self.watchdog_fake.clk_domain = clkdomain - self.gpio0_fake.clk_domain = clkdomain - self.gpio1_fake.clk_domain = clkdomain - self.gpio2_fake.clk_domain = clkdomain - self.ssp_fake.clk_domain = clkdomain - self.sci_fake.clk_domain = clkdomain - self.aaci_fake.clk_domain = clkdomain - self.mmc_fake.clk_domain = clkdomain - self.rtc.clk_domain = clkdomain - self.flash_fake.clk_domain = clkdomain - self.smcreg_fake.clk_domain = clkdomain - self.energy_ctrl.clk_domain = clkdomain - class VExpress_EMM(RealView): _mem_regions = [(Addr('2GB'), Addr('2GB'))] -- cgit v1.2.3