From ed48d740e85c167aa48a2c4fe82ca632e4c3cbb7 Mon Sep 17 00:00:00 2001 From: Giacomo Travaglini Date: Fri, 5 Apr 2019 13:39:05 +0100 Subject: dev-arm: Limit number of max PE in GICv3 to 128 This is needed since there is a problem in the memory layout of VExpress_GEM5_V2 as it is: having 256KB pages is creating overlapping regions when reserving space for 256 PEs. GICv3 redistributors: 0x2c010000 - 0x30010000 PCI regions: 0x30000000 - 0x40000000 We fix this by cutting down the number of supported PEs to 128 Change-Id: I6e87f66a6150a441ccba298662b4548a4972dc40 Signed-off-by: Giacomo Travaglini Reviewed-by: Andreas Sandberg Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18392 Maintainer: Andreas Sandberg Tested-by: kokoro --- src/dev/arm/RealView.py | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/dev/arm/RealView.py') diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py index 908644899..f83f075f6 100644 --- a/src/dev/arm/RealView.py +++ b/src/dev/arm/RealView.py @@ -1085,6 +1085,9 @@ class VExpress_GEM5_V1(VExpress_GEM5_V1_Base): class VExpress_GEM5_V2_Base(VExpress_GEM5_Base): gic = Gicv3(maint_int=ArmPPI(num=25)) + # Limiting to 128 since it will otherwise overlap with PCI space + gic.cpu_max = 128 + def _on_chip_devices(self): return super(VExpress_GEM5_V2_Base,self)._on_chip_devices() + [ self.gic, -- cgit v1.2.3