From 07cf9d914b292008ead7021182ec2ef8fc4671f1 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Tue, 17 Jan 2012 12:55:09 -0600 Subject: MEM: Separate queries for snooping and address ranges This patch simplifies the address-range determination mechanism and also unifies the naming across ports and devices. It further splits the queries for determining if a port is snooping and what address ranges it responds to (aiming towards a separation of cache-maintenance ports and pure memory-mapped ports). Default behaviours are such that most ports do not have to define isSnooping, and master ports need not implement getAddrRanges. --- src/dev/arm/gic.cc | 11 ++++++----- src/dev/arm/gic.hh | 2 +- src/dev/arm/pl111.cc | 9 +++++---- src/dev/arm/pl111.hh | 8 +++++--- 4 files changed, 17 insertions(+), 13 deletions(-) (limited to 'src/dev/arm') diff --git a/src/dev/arm/gic.cc b/src/dev/arm/gic.cc index 2dac18c08..4c45760b8 100644 --- a/src/dev/arm/gic.cc +++ b/src/dev/arm/gic.cc @@ -703,12 +703,13 @@ Gic::postInt(uint32_t cpu, Tick when) eventq->schedule(postIntEvent[cpu], when); } -void -Gic::addressRanges(AddrRangeList &range_list) +AddrRangeList +Gic::getAddrRanges() { - range_list.clear(); - range_list.push_back(RangeSize(distAddr, DIST_SIZE)); - range_list.push_back(RangeSize(cpuAddr, CPU_SIZE)); + AddrRangeList ranges; + ranges.push_back(RangeSize(distAddr, DIST_SIZE)); + ranges.push_back(RangeSize(cpuAddr, CPU_SIZE)); + return ranges; } diff --git a/src/dev/arm/gic.hh b/src/dev/arm/gic.hh index 4c43db660..6e3f12cdb 100644 --- a/src/dev/arm/gic.hh +++ b/src/dev/arm/gic.hh @@ -259,7 +259,7 @@ class Gic : public PioDevice /** Return the address ranges used by the Gic * This is the distributor address + all cpu addresses */ - virtual void addressRanges(AddrRangeList &range_list); + virtual AddrRangeList getAddrRanges(); /** A PIO read to the device, immediately split up into * readDistributor() or readCpu() diff --git a/src/dev/arm/pl111.cc b/src/dev/arm/pl111.cc index 958f07aa7..263a3b620 100644 --- a/src/dev/arm/pl111.cc +++ b/src/dev/arm/pl111.cc @@ -735,11 +735,12 @@ Pl111::generateInterrupt() } } -void -Pl111::addressRanges(AddrRangeList& range_list) +AddrRangeList +Pl111::getAddrRanges() { - range_list.clear(); - range_list.push_back(RangeSize(pioAddr, pioSize)); + AddrRangeList ranges; + ranges.push_back(RangeSize(pioAddr, pioSize)); + return ranges; } Pl111 * diff --git a/src/dev/arm/pl111.hh b/src/dev/arm/pl111.hh index f36dc6810..b2dc1f640 100644 --- a/src/dev/arm/pl111.hh +++ b/src/dev/arm/pl111.hh @@ -325,10 +325,12 @@ class Pl111: public AmbaDmaDevice virtual void serialize(std::ostream &os); virtual void unserialize(Checkpoint *cp, const std::string §ion); - /** return the address ranges that this device responds to. - * @param range_list range list to populate with ranges + /** + * Determine the address ranges that this device responds to. + * + * @return a list of non-overlapping address ranges */ - void addressRanges(AddrRangeList &range_list); + AddrRangeList getAddrRanges(); }; #endif -- cgit v1.2.3 From 2208ea049f60618e432c69c065926bcbc810581a Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Tue, 17 Jan 2012 12:55:09 -0600 Subject: MEM: Make the bus bridge unidirectional and fixed address range This patch makes the bus bridge uni-directional and specialises the bus ports to be a master port and a slave port. This greatly simplifies the assumptions on both sides as either port only has to deal with requests or responses. The following patches introduce the notion of master and slave ports, and would not be possible without this split of responsibilities. In making the bridge unidirectional, the address range mechanism of the bridge is also changed. For the cases where communication is taking place both ways, an additional bridge is needed. This causes issues with the existing mechanism, as the busses cannot determine when to stop iterating the address updates from the two bridges. To avoid this issue, and also greatly simplify the specification, the bridge now has a fixed set of address ranges, specified at creation time. --- src/dev/arm/RealView.py | 31 ++++++++++++++++++++++++------- 1 file changed, 24 insertions(+), 7 deletions(-) (limited to 'src/dev/arm') diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py index 96f3c8a61..cd7744362 100644 --- a/src/dev/arm/RealView.py +++ b/src/dev/arm/RealView.py @@ -1,4 +1,4 @@ -# Copyright (c) 2009 ARM Limited +# Copyright (c) 2009-2011 ARM Limited # All rights reserved. # # The license below extends only to copyright in the software and shall @@ -177,12 +177,18 @@ class RealViewPBX(RealView): rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031) - # Attach I/O devices that are on chip - def attachOnChipIO(self, bus): + # Attach I/O devices that are on chip and also set the appropriate + # ranges for the bridge + def attachOnChipIO(self, bus, bridge): self.gic.pio = bus.port self.l2x0_fake.pio = bus.port self.a9scu.pio = bus.port self.local_cpu_timer.pio = bus.port + # Bridge ranges based on excluding what is part of on-chip I/O + # (gic, l2x0, a9scu, local_cpu_timer) + bridge.ranges = [AddrRange(self.realview_io.pio_addr, + self.a9scu.pio_addr - 1), + AddrRange(self.flash_fake.pio_addr, Addr.max)] # Attach I/O devices to specified bus object. Can't do this # earlier, since the bus object itself is typically defined at the @@ -248,10 +254,16 @@ class RealViewEB(RealView): - # Attach I/O devices that are on chip - def attachOnChipIO(self, bus): + # Attach I/O devices that are on chip and also set the appropriate + # ranges for the bridge + def attachOnChipIO(self, bus, bridge): self.gic.pio = bus.port self.l2x0_fake.pio = bus.port + # Bridge ranges based on excluding what is part of on-chip I/O + # (gic, l2x0) + bridge.ranges = [AddrRange(self.realview_io.pio_addr, + self.gic.cpu_addr - 1), + AddrRange(self.flash_fake.pio_addr, Addr.max)] # Attach I/O devices to specified bus object. Can't do this # earlier, since the bus object itself is typically defined at the @@ -329,10 +341,15 @@ class VExpress_ELT(RealView): usb_fake = IsaFake(pio_addr=0xFB000000, pio_size=0x1ffff) - # Attach I/O devices that are on chip - def attachOnChipIO(self, bus): + # Attach I/O devices that are on chip and also set the appropriate + # ranges for the bridge + def attachOnChipIO(self, bus, bridge): self.gic.pio = bus.port self.a9scu.pio = bus.port + # Bridge ranges based on excluding what is part of on-chip I/O + # (gic, a9scu) + bridge.ranges = [AddrRange(self.pci_cfg_base, self.a9scu.pio_addr - 1), + AddrRange(self.local_cpu_timer.pio_addr, Addr.max)] # Attach I/O devices to specified bus object. Can't do this # earlier, since the bus object itself is typically defined at the -- cgit v1.2.3 From 55cf3f4ac11668c4da71411a4221cc8c84298b1a Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Tue, 17 Jan 2012 12:55:09 -0600 Subject: MEM: Removing the default port peer from Python ports In preparation for the introduction of Master and Slave ports, this patch removes the default port parameter in the Python port and thus forces the argument list of the Port to contain only the description. The drawback at this point is that the config port and dma port of PCI and DMA devices have to be connected explicitly. This is key for future diversification as the pio and config port are slaves, but the dma port is a master. --- src/dev/arm/RealView.py | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'src/dev/arm') diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py index cd7744362..1dec9a40d 100644 --- a/src/dev/arm/RealView.py +++ b/src/dev/arm/RealView.py @@ -199,9 +199,12 @@ class RealViewPBX(RealView): self.timer0.pio = bus.port self.timer1.pio = bus.port self.clcd.pio = bus.port + self.clcd.dma = bus.port self.kmi0.pio = bus.port self.kmi1.pio = bus.port self.cf_ctrl.pio = bus.port + self.cf_ctrl.config = bus.port + self.cf_ctrl.dma = bus.port self.dmac_fake.pio = bus.port self.uart1_fake.pio = bus.port self.uart2_fake.pio = bus.port @@ -274,6 +277,7 @@ class RealViewEB(RealView): self.timer0.pio = bus.port self.timer1.pio = bus.port self.clcd.pio = bus.port + self.clcd.dma = bus.port self.kmi0.pio = bus.port self.kmi1.pio = bus.port self.dmac_fake.pio = bus.port @@ -364,13 +368,20 @@ class VExpress_ELT(RealView): self.elba_timer0.pio = bus.port self.elba_timer1.pio = bus.port self.clcd.pio = bus.port + self.clcd.dma = bus.port self.kmi0.pio = bus.port self.kmi1.pio = bus.port self.elba_kmi0.pio = bus.port self.elba_kmi1.pio = bus.port self.cf_ctrl.pio = bus.port + self.cf_ctrl.config = bus.port + self.cf_ctrl.dma = bus.port self.ide.pio = bus.port + self.ide.config = bus.port + self.ide.dma = bus.port self.ethernet.pio = bus.port + self.ethernet.config = bus.port + self.ethernet.dma = bus.port self.pciconfig.pio = bus.default bus.use_default_range = True -- cgit v1.2.3