From e99828b06a1b694b7aca09682ae2b1be9089af88 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Thu, 15 Apr 2010 16:24:12 -0700 Subject: tick: rename Clock namespace to SimClock --- src/dev/i8254xGBe.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/dev/i8254xGBe.cc') diff --git a/src/dev/i8254xGBe.cc b/src/dev/i8254xGBe.cc index ca7e9e67a..2a044ebbe 100644 --- a/src/dev/i8254xGBe.cc +++ b/src/dev/i8254xGBe.cc @@ -693,7 +693,7 @@ IGbE::postInterrupt(IntTypes t, bool now) regs.icr = regs.icr() | t; - Tick itr_interval = Clock::Int::ns * 256 * regs.itr.interval(); + Tick itr_interval = SimClock::Int::ns * 256 * regs.itr.interval(); DPRINTF(EthernetIntr, "EINT: postInterrupt() curTick: %d itr: %d interval: %d\n", curTick, regs.itr.interval(), itr_interval); @@ -801,7 +801,7 @@ IGbE::chkInterrupt() DPRINTF(Ethernet, "Possibly scheduling interrupt because of imr write\n"); if (!interEvent.scheduled()) { - Tick t = curTick + Clock::Int::ns * 256 * regs.itr.interval(); + Tick t = curTick + SimClock::Int::ns * 256 * regs.itr.interval(); DPRINTF(Ethernet, "Scheduling for %d\n", t); schedule(interEvent, t); } -- cgit v1.2.3