From 9dc4e2952cf34a794c18c7b98010c0b496123f9e Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Tue, 17 Jun 2008 20:39:51 -0700 Subject: rename MipsConsole to MipsBackdoor --HG-- rename : src/dev/mips/MipsConsole.py => src/dev/mips/MipsBackdoor.py rename : src/dev/mips/console.cc => src/dev/mips/backdoor.cc rename : src/dev/mips/console.hh => src/dev/mips/backdoor.hh --- src/dev/mips/Malta.py | 11 +- src/dev/mips/MipsBackdoor.py | 38 ++++++ src/dev/mips/MipsConsole.py | 38 ------ src/dev/mips/SConscript | 4 +- src/dev/mips/backdoor.cc | 297 +++++++++++++++++++++++++++++++++++++++++++ src/dev/mips/backdoor.hh | 126 ++++++++++++++++++ src/dev/mips/console.cc | 297 ------------------------------------------- src/dev/mips/console.hh | 126 ------------------ 8 files changed, 469 insertions(+), 468 deletions(-) create mode 100644 src/dev/mips/MipsBackdoor.py delete mode 100644 src/dev/mips/MipsConsole.py create mode 100755 src/dev/mips/backdoor.cc create mode 100755 src/dev/mips/backdoor.hh delete mode 100755 src/dev/mips/console.cc delete mode 100755 src/dev/mips/console.hh (limited to 'src/dev/mips') diff --git a/src/dev/mips/Malta.py b/src/dev/mips/Malta.py index d321a6361..d215bf329 100755 --- a/src/dev/mips/Malta.py +++ b/src/dev/mips/Malta.py @@ -28,12 +28,13 @@ from m5.params import * from m5.proxy import * + +from BadDevice import BadDevice from Device import BasicPioDevice +from MipsBackdoor import MipsBackdoor +from Pci import PciConfigAll from Platform import Platform -from MipsConsole import MipsConsole from Uart import Uart8250 -from Pci import PciConfigAll -from BadDevice import BadDevice class MaltaCChip(BasicPioDevice): type = 'MaltaCChip' @@ -56,7 +57,7 @@ class Malta(Platform): cchip = MaltaCChip(pio_addr=0x801a0000000) io = MaltaIO(pio_addr=0x801fc000000) uart = Uart8250(pio_addr=0xBFD003F8) - console = MipsConsole(pio_addr=0xBFD00F00, disk=Parent.simple_disk) + backdoor = MipsBackdoor(pio_addr=0xBFD00F00, disk=Parent.simple_disk) # Attach I/O devices to specified bus object. Can't do this # earlier, since the bus object itself is typically defined at the @@ -65,4 +66,4 @@ class Malta(Platform): self.cchip.pio = bus.port self.io.pio = bus.port self.uart.pio = bus.port - self.console.pio = bus.port + self.backdoor.pio = bus.port diff --git a/src/dev/mips/MipsBackdoor.py b/src/dev/mips/MipsBackdoor.py new file mode 100644 index 000000000..f65250238 --- /dev/null +++ b/src/dev/mips/MipsBackdoor.py @@ -0,0 +1,38 @@ +# Copyright (c) 2007 The Regents of The University of Michigan +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Korey Sewell + +from m5.params import * +from m5.proxy import * +from Device import BasicPioDevice + +class MipsBackdoor(BasicPioDevice): + type = 'MipsBackdoor' + cpu = Param.BaseCPU(Parent.cpu[0], "Processor") + disk = Param.SimpleDisk("Simple Disk") + terminal = Param.Terminal(Parent.any, "The console terminal") + system = Param.MipsSystem(Parent.any, "system object") diff --git a/src/dev/mips/MipsConsole.py b/src/dev/mips/MipsConsole.py deleted file mode 100644 index 8b724991a..000000000 --- a/src/dev/mips/MipsConsole.py +++ /dev/null @@ -1,38 +0,0 @@ -# Copyright (c) 2007 The Regents of The University of Michigan -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are -# met: redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer; -# redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution; -# neither the name of the copyright holders nor the names of its -# contributors may be used to endorse or promote products derived from -# this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Korey Sewell - -from m5.params import * -from m5.proxy import * -from Device import BasicPioDevice - -class MipsConsole(BasicPioDevice): - type = 'MipsConsole' - cpu = Param.BaseCPU(Parent.cpu[0], "Processor") - disk = Param.SimpleDisk("Simple Disk") - terminal = Param.Terminal(Parent.any, "The console terminal") - system = Param.MipsSystem(Parent.any, "system object") diff --git a/src/dev/mips/SConscript b/src/dev/mips/SConscript index 22e91ff09..e83e47ebd 100755 --- a/src/dev/mips/SConscript +++ b/src/dev/mips/SConscript @@ -32,13 +32,13 @@ Import('*') if env['FULL_SYSTEM'] and env['TARGET_ISA'] == 'mips': - SimObject('MipsConsole.py') + SimObject('MipsBackdoor.py') SimObject('Malta.py') TraceFlag('Malta') TraceFlag('MC146818') - Source('console.cc') + Source('backdoor.cc') Source('malta.cc') Source('malta_cchip.cc') Source('malta_io.cc') diff --git a/src/dev/mips/backdoor.cc b/src/dev/mips/backdoor.cc new file mode 100755 index 000000000..313f12567 --- /dev/null +++ b/src/dev/mips/backdoor.cc @@ -0,0 +1,297 @@ +/* + * Copyright (c) 2001-2005 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Nathan Binkert + * Ali Saidi + * Steve Reinhardt + * Erik Hallnor + */ + +/** @file + * Mips Console Backdoor Definition + */ +#include +#include + +#include "arch/mips/system.hh" +#include "base/inifile.hh" +#include "base/str.hh" +#include "base/trace.hh" +#include "cpu/base.hh" +#include "cpu/thread_context.hh" +#include "dev/mips/backdoor.hh" +#include "dev/platform.hh" +#include "dev/simple_disk.hh" +#include "dev/terminal.hh" +#include "mem/packet.hh" +#include "mem/packet_access.hh" +#include "mem/physical.hh" +#include "params/MipsBackdoor.hh" +#include "sim/sim_object.hh" + + +using namespace std; +using namespace MipsISA; + +MipsBackdoor::MipsBackdoor(const Params *p) + : BasicPioDevice(p), disk(p->disk), terminal(p->terminal), + system(p->system), cpu(p->cpu) +{ + + pioSize = sizeof(struct MipsAccess); + + mipsAccess = new Access(); + mipsAccess->last_offset = pioSize - 1; + + mipsAccess->version = MIPS_ACCESS_VERSION; + mipsAccess->diskUnit = 1; + + mipsAccess->diskCount = 0; + mipsAccess->diskPAddr = 0; + mipsAccess->diskBlock = 0; + mipsAccess->diskOperation = 0; + mipsAccess->outputChar = 0; + mipsAccess->inputChar = 0; + bzero(mipsAccess->cpuStack, sizeof(mipsAccess->cpuStack)); + +} + +void +MipsBackdoor::startup() +{ + system->setMipsAccess(pioAddr); + mipsAccess->numCPUs = system->getNumCPUs(); + mipsAccess->kernStart = MipsISA::Phys2K0Seg(system->getKernelStart()); + mipsAccess->kernEnd = MipsISA::Phys2K0Seg(system->getKernelEnd()); + mipsAccess->entryPoint = MipsISA::Phys2K0Seg(system->getKernelEntry()); + mipsAccess->mem_size = system->physmem->size(); + mipsAccess->cpuClock = cpu->frequency() / 1000000; // In MHz + mipsAccess->intrClockFrequency = params()->platform->intrFrequency(); +} + +Tick +MipsBackdoor::read(PacketPtr pkt) +{ + + /** XXX Do we want to push the addr munging to a bus brige or something? So + * the device has it's physical address and then the bridge adds on whatever + * machine dependent address swizzle is required? + */ + assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); + + Addr daddr = pkt->getAddr() - pioAddr; + + pkt->allocate(); + + switch (pkt->getSize()) + { + case sizeof(uint32_t): + switch (daddr) + { + case offsetof(MipsAccess, last_offset): + pkt->set(mipsAccess->last_offset); + break; + case offsetof(MipsAccess, version): + pkt->set(mipsAccess->version); + break; + case offsetof(MipsAccess, numCPUs): + pkt->set(mipsAccess->numCPUs); + break; + case offsetof(MipsAccess, intrClockFrequency): + pkt->set(mipsAccess->intrClockFrequency); + break; + case offsetof(MipsAccess, inputChar): + pkt->set(terminal->console_in()); + break; + case offsetof(MipsAccess, cpuClock): + pkt->set(mipsAccess->cpuClock); + break; + case offsetof(MipsAccess, mem_size): + pkt->set(mipsAccess->mem_size); + break; + case offsetof(MipsAccess, kernStart): + pkt->set(mipsAccess->kernStart); + break; + case offsetof(MipsAccess, kernEnd): + pkt->set(mipsAccess->kernEnd); + break; + case offsetof(MipsAccess, entryPoint): + pkt->set(mipsAccess->entryPoint); + break; + case offsetof(MipsAccess, diskUnit): + pkt->set(mipsAccess->diskUnit); + break; + case offsetof(MipsAccess, diskCount): + pkt->set(mipsAccess->diskCount); + break; + case offsetof(MipsAccess, diskPAddr): + pkt->set(mipsAccess->diskPAddr); + break; + case offsetof(MipsAccess, diskBlock): + pkt->set(mipsAccess->diskBlock); + break; + case offsetof(MipsAccess, diskOperation): + pkt->set(mipsAccess->diskOperation); + break; + case offsetof(MipsAccess, outputChar): + pkt->set(mipsAccess->outputChar); + break; + default: + int cpunum = (daddr - offsetof(MipsAccess, cpuStack)) / + sizeof(mipsAccess->cpuStack[0]); + + if (cpunum >= 0 && cpunum < 64) + pkt->set(mipsAccess->cpuStack[cpunum]); + else + panic("Unknown 32bit access, %#x\n", daddr); + } + //DPRINTF(MipsBackdoor, "read: offset=%#x val=%#x\n", daddr, + // pkt->get()); + break; + default: + pkt->setBadAddress(); + } + + pkt->makeAtomicResponse(); + return pioDelay; +} + +Tick +MipsBackdoor::write(PacketPtr pkt) +{ + assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); + Addr daddr = pkt->getAddr() - pioAddr; + + uint32_t val = pkt->get(); + assert(pkt->getSize() == sizeof(uint32_t)); + switch (daddr) { + case offsetof(MipsAccess, diskUnit): + mipsAccess->diskUnit = val; + break; + + case offsetof(MipsAccess, diskCount): + mipsAccess->diskCount = val; + break; + + case offsetof(MipsAccess, diskPAddr): + mipsAccess->diskPAddr = val; + break; + + case offsetof(MipsAccess, diskBlock): + mipsAccess->diskBlock = val; + break; + + case offsetof(MipsAccess, diskOperation): + if (val == 0x13) + disk->read(mipsAccess->diskPAddr, mipsAccess->diskBlock, + mipsAccess->diskCount); + else + panic("Invalid disk operation!"); + + break; + + case offsetof(MipsAccess, outputChar): + terminal->out((char)(val & 0xff)); + break; + + default: + int cpunum = (daddr - offsetof(MipsAccess, cpuStack)) / + sizeof(mipsAccess->cpuStack[0]); + warn("%d: Trying to launch CPU number %d!", curTick, cpunum); + assert(val > 0 && "Must not access primary cpu"); + if (cpunum >= 0 && cpunum < 64) + mipsAccess->cpuStack[cpunum] = val; + else + panic("Unknown 32bit access, %#x\n", daddr); + } + + pkt->makeAtomicResponse(); + + return pioDelay; +} + +void +MipsBackdoor::Access::serialize(ostream &os) +{ + SERIALIZE_SCALAR(last_offset); + SERIALIZE_SCALAR(version); + SERIALIZE_SCALAR(numCPUs); + SERIALIZE_SCALAR(mem_size); + SERIALIZE_SCALAR(cpuClock); + SERIALIZE_SCALAR(intrClockFrequency); + SERIALIZE_SCALAR(kernStart); + SERIALIZE_SCALAR(kernEnd); + SERIALIZE_SCALAR(entryPoint); + SERIALIZE_SCALAR(diskUnit); + SERIALIZE_SCALAR(diskCount); + SERIALIZE_SCALAR(diskPAddr); + SERIALIZE_SCALAR(diskBlock); + SERIALIZE_SCALAR(diskOperation); + SERIALIZE_SCALAR(outputChar); + SERIALIZE_SCALAR(inputChar); + SERIALIZE_ARRAY(cpuStack,64); +} + +void +MipsBackdoor::Access::unserialize(Checkpoint *cp, const std::string §ion) +{ + UNSERIALIZE_SCALAR(last_offset); + UNSERIALIZE_SCALAR(version); + UNSERIALIZE_SCALAR(numCPUs); + UNSERIALIZE_SCALAR(mem_size); + UNSERIALIZE_SCALAR(cpuClock); + UNSERIALIZE_SCALAR(intrClockFrequency); + UNSERIALIZE_SCALAR(kernStart); + UNSERIALIZE_SCALAR(kernEnd); + UNSERIALIZE_SCALAR(entryPoint); + UNSERIALIZE_SCALAR(diskUnit); + UNSERIALIZE_SCALAR(diskCount); + UNSERIALIZE_SCALAR(diskPAddr); + UNSERIALIZE_SCALAR(diskBlock); + UNSERIALIZE_SCALAR(diskOperation); + UNSERIALIZE_SCALAR(outputChar); + UNSERIALIZE_SCALAR(inputChar); + UNSERIALIZE_ARRAY(cpuStack, 64); +} + +void +MipsBackdoor::serialize(ostream &os) +{ + mipsAccess->serialize(os); +} + +void +MipsBackdoor::unserialize(Checkpoint *cp, const std::string §ion) +{ + mipsAccess->unserialize(cp, section); +} + +MipsBackdoor * +MipsBackdoorParams::create() +{ + return new MipsBackdoor(this); +} diff --git a/src/dev/mips/backdoor.hh b/src/dev/mips/backdoor.hh new file mode 100755 index 000000000..b8cc0ae46 --- /dev/null +++ b/src/dev/mips/backdoor.hh @@ -0,0 +1,126 @@ +/* + * Copyright (c) 2001-2005 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Nathan Binkert + */ + +/** @file + * System Console Backdoor Interface + */ + +#ifndef __DEV_MIPS_BACKDOOR_HH__ +#define __DEV_MIPS_BACKDOOR_HH__ + +#include "base/range.hh" +#include "dev/mips/access.h" +#include "dev/io_device.hh" +#include "params/MipsBackdoor.hh" +#include "sim/host.hh" +#include "sim/sim_object.hh" + +class BaseCPU; +class Terminal; +class MipsSystem; +class SimpleDisk; + +/** + * Memory mapped interface to the system console. This device + * represents a shared data region between the OS Kernel and the + * System Console Backdoor. + * + * The system console is a small standalone program that is initially + * run when the system boots. It contains the necessary code to + * access the boot disk, to read/write from the console, and to pass + * boot parameters to the kernel. + * + * This version of the system console is very different from the one + * that would be found in a real system. Many of the functions use + * some sort of backdoor to get their job done. For example, reading + * from the boot device on a real system would require a minimal + * device driver to access the disk controller, but since we have a + * simulator here, we are able to bypass the disk controller and + * access the disk image directly. There are also some things like + * reading the kernel off the disk image into memory that are normally + * taken care of by the console that are now taken care of by the + * simulator. + * + * These shortcuts are acceptable since the system console is + * primarily used doing boot before the kernel has loaded its device + * drivers. + */ +class MipsBackdoor : public BasicPioDevice +{ + protected: + struct Access : public MipsAccess + { + void serialize(std::ostream &os); + void unserialize(Checkpoint *cp, const std::string §ion); + }; + + union { + Access *mipsAccess; + uint8_t *consoleData; + }; + + /** the disk must be accessed from the console */ + SimpleDisk *disk; + + /** the system terminal is accessable from the console */ + Terminal *terminal; + + /** a pointer to the system we are running in */ + MipsSystem *system; + + /** a pointer to the CPU boot cpu */ + BaseCPU *cpu; + + public: + typedef MipsBackdoorParams Params; + MipsBackdoor(const Params *p); + + const Params * + params() const + { + return dynamic_cast(_params); + } + + virtual void startup(); + + /** + * memory mapped reads and writes + */ + virtual Tick read(PacketPtr pkt); + virtual Tick write(PacketPtr pkt); + + /** + * standard serialization routines for checkpointing + */ + virtual void serialize(std::ostream &os); + virtual void unserialize(Checkpoint *cp, const std::string §ion); +}; + +#endif // __DEV_MIPS_BACKDOOR_HH__ diff --git a/src/dev/mips/console.cc b/src/dev/mips/console.cc deleted file mode 100755 index d1663999a..000000000 --- a/src/dev/mips/console.cc +++ /dev/null @@ -1,297 +0,0 @@ -/* - * Copyright (c) 2001-2005 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Nathan Binkert - * Ali Saidi - * Steve Reinhardt - * Erik Hallnor - */ - -/** @file - * Mips Console Definition - */ -#include -#include - -#include "arch/mips/system.hh" -#include "base/inifile.hh" -#include "base/str.hh" -#include "base/trace.hh" -#include "cpu/base.hh" -#include "cpu/thread_context.hh" -#include "dev/mips/console.hh" -#include "dev/platform.hh" -#include "dev/simple_disk.hh" -#include "dev/terminal.hh" -#include "mem/packet.hh" -#include "mem/packet_access.hh" -#include "mem/physical.hh" -#include "params/MipsConsole.hh" -#include "sim/sim_object.hh" - - -using namespace std; -using namespace MipsISA; - -MipsConsole::MipsConsole(const Params *p) - : BasicPioDevice(p), disk(p->disk), terminal(p->terminal), - system(p->system), cpu(p->cpu) -{ - - pioSize = sizeof(struct MipsAccess); - - mipsAccess = new Access(); - mipsAccess->last_offset = pioSize - 1; - - mipsAccess->version = MIPS_ACCESS_VERSION; - mipsAccess->diskUnit = 1; - - mipsAccess->diskCount = 0; - mipsAccess->diskPAddr = 0; - mipsAccess->diskBlock = 0; - mipsAccess->diskOperation = 0; - mipsAccess->outputChar = 0; - mipsAccess->inputChar = 0; - bzero(mipsAccess->cpuStack, sizeof(mipsAccess->cpuStack)); - -} - -void -MipsConsole::startup() -{ - system->setMipsAccess(pioAddr); - mipsAccess->numCPUs = system->getNumCPUs(); - mipsAccess->kernStart = MipsISA::Phys2K0Seg(system->getKernelStart()); - mipsAccess->kernEnd = MipsISA::Phys2K0Seg(system->getKernelEnd()); - mipsAccess->entryPoint = MipsISA::Phys2K0Seg(system->getKernelEntry()); - mipsAccess->mem_size = system->physmem->size(); - mipsAccess->cpuClock = cpu->frequency() / 1000000; // In MHz - mipsAccess->intrClockFrequency = params()->platform->intrFrequency(); -} - -Tick -MipsConsole::read(PacketPtr pkt) -{ - - /** XXX Do we want to push the addr munging to a bus brige or something? So - * the device has it's physical address and then the bridge adds on whatever - * machine dependent address swizzle is required? - */ - assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); - - Addr daddr = pkt->getAddr() - pioAddr; - - pkt->allocate(); - - switch (pkt->getSize()) - { - case sizeof(uint32_t): - switch (daddr) - { - case offsetof(MipsAccess, last_offset): - pkt->set(mipsAccess->last_offset); - break; - case offsetof(MipsAccess, version): - pkt->set(mipsAccess->version); - break; - case offsetof(MipsAccess, numCPUs): - pkt->set(mipsAccess->numCPUs); - break; - case offsetof(MipsAccess, intrClockFrequency): - pkt->set(mipsAccess->intrClockFrequency); - break; - case offsetof(MipsAccess, inputChar): - pkt->set(terminal->console_in()); - break; - case offsetof(MipsAccess, cpuClock): - pkt->set(mipsAccess->cpuClock); - break; - case offsetof(MipsAccess, mem_size): - pkt->set(mipsAccess->mem_size); - break; - case offsetof(MipsAccess, kernStart): - pkt->set(mipsAccess->kernStart); - break; - case offsetof(MipsAccess, kernEnd): - pkt->set(mipsAccess->kernEnd); - break; - case offsetof(MipsAccess, entryPoint): - pkt->set(mipsAccess->entryPoint); - break; - case offsetof(MipsAccess, diskUnit): - pkt->set(mipsAccess->diskUnit); - break; - case offsetof(MipsAccess, diskCount): - pkt->set(mipsAccess->diskCount); - break; - case offsetof(MipsAccess, diskPAddr): - pkt->set(mipsAccess->diskPAddr); - break; - case offsetof(MipsAccess, diskBlock): - pkt->set(mipsAccess->diskBlock); - break; - case offsetof(MipsAccess, diskOperation): - pkt->set(mipsAccess->diskOperation); - break; - case offsetof(MipsAccess, outputChar): - pkt->set(mipsAccess->outputChar); - break; - default: - int cpunum = (daddr - offsetof(MipsAccess, cpuStack)) / - sizeof(mipsAccess->cpuStack[0]); - - if (cpunum >= 0 && cpunum < 64) - pkt->set(mipsAccess->cpuStack[cpunum]); - else - panic("Unknown 32bit access, %#x\n", daddr); - } - //DPRINTF(MipsConsole, "read: offset=%#x val=%#x\n", daddr, - // pkt->get()); - break; - default: - pkt->setBadAddress(); - } - - pkt->makeAtomicResponse(); - return pioDelay; -} - -Tick -MipsConsole::write(PacketPtr pkt) -{ - assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); - Addr daddr = pkt->getAddr() - pioAddr; - - uint32_t val = pkt->get(); - assert(pkt->getSize() == sizeof(uint32_t)); - switch (daddr) { - case offsetof(MipsAccess, diskUnit): - mipsAccess->diskUnit = val; - break; - - case offsetof(MipsAccess, diskCount): - mipsAccess->diskCount = val; - break; - - case offsetof(MipsAccess, diskPAddr): - mipsAccess->diskPAddr = val; - break; - - case offsetof(MipsAccess, diskBlock): - mipsAccess->diskBlock = val; - break; - - case offsetof(MipsAccess, diskOperation): - if (val == 0x13) - disk->read(mipsAccess->diskPAddr, mipsAccess->diskBlock, - mipsAccess->diskCount); - else - panic("Invalid disk operation!"); - - break; - - case offsetof(MipsAccess, outputChar): - terminal->out((char)(val & 0xff)); - break; - - default: - int cpunum = (daddr - offsetof(MipsAccess, cpuStack)) / - sizeof(mipsAccess->cpuStack[0]); - warn("%d: Trying to launch CPU number %d!", curTick, cpunum); - assert(val > 0 && "Must not access primary cpu"); - if (cpunum >= 0 && cpunum < 64) - mipsAccess->cpuStack[cpunum] = val; - else - panic("Unknown 32bit access, %#x\n", daddr); - } - - pkt->makeAtomicResponse(); - - return pioDelay; -} - -void -MipsConsole::Access::serialize(ostream &os) -{ - SERIALIZE_SCALAR(last_offset); - SERIALIZE_SCALAR(version); - SERIALIZE_SCALAR(numCPUs); - SERIALIZE_SCALAR(mem_size); - SERIALIZE_SCALAR(cpuClock); - SERIALIZE_SCALAR(intrClockFrequency); - SERIALIZE_SCALAR(kernStart); - SERIALIZE_SCALAR(kernEnd); - SERIALIZE_SCALAR(entryPoint); - SERIALIZE_SCALAR(diskUnit); - SERIALIZE_SCALAR(diskCount); - SERIALIZE_SCALAR(diskPAddr); - SERIALIZE_SCALAR(diskBlock); - SERIALIZE_SCALAR(diskOperation); - SERIALIZE_SCALAR(outputChar); - SERIALIZE_SCALAR(inputChar); - SERIALIZE_ARRAY(cpuStack,64); -} - -void -MipsConsole::Access::unserialize(Checkpoint *cp, const std::string §ion) -{ - UNSERIALIZE_SCALAR(last_offset); - UNSERIALIZE_SCALAR(version); - UNSERIALIZE_SCALAR(numCPUs); - UNSERIALIZE_SCALAR(mem_size); - UNSERIALIZE_SCALAR(cpuClock); - UNSERIALIZE_SCALAR(intrClockFrequency); - UNSERIALIZE_SCALAR(kernStart); - UNSERIALIZE_SCALAR(kernEnd); - UNSERIALIZE_SCALAR(entryPoint); - UNSERIALIZE_SCALAR(diskUnit); - UNSERIALIZE_SCALAR(diskCount); - UNSERIALIZE_SCALAR(diskPAddr); - UNSERIALIZE_SCALAR(diskBlock); - UNSERIALIZE_SCALAR(diskOperation); - UNSERIALIZE_SCALAR(outputChar); - UNSERIALIZE_SCALAR(inputChar); - UNSERIALIZE_ARRAY(cpuStack, 64); -} - -void -MipsConsole::serialize(ostream &os) -{ - mipsAccess->serialize(os); -} - -void -MipsConsole::unserialize(Checkpoint *cp, const std::string §ion) -{ - mipsAccess->unserialize(cp, section); -} - -MipsConsole * -MipsConsoleParams::create() -{ - return new MipsConsole(this); -} diff --git a/src/dev/mips/console.hh b/src/dev/mips/console.hh deleted file mode 100755 index a78343f35..000000000 --- a/src/dev/mips/console.hh +++ /dev/null @@ -1,126 +0,0 @@ -/* - * Copyright (c) 2001-2005 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Nathan Binkert - */ - -/** @file - * System Console Interface - */ - -#ifndef __MIPS_CONSOLE_HH__ -#define __MIPS_CONSOLE_HH__ - -#include "base/range.hh" -#include "dev/mips/access.h" -#include "dev/io_device.hh" -#include "params/MipsConsole.hh" -#include "sim/host.hh" -#include "sim/sim_object.hh" - -class BaseCPU; -class Terminal; -class MipsSystem; -class SimpleDisk; - -/** - * Memory mapped interface to the system console. This device - * represents a shared data region between the OS Kernel and the - * System Console. - * - * The system console is a small standalone program that is initially - * run when the system boots. It contains the necessary code to - * access the boot disk, to read/write from the console, and to pass - * boot parameters to the kernel. - * - * This version of the system console is very different from the one - * that would be found in a real system. Many of the functions use - * some sort of backdoor to get their job done. For example, reading - * from the boot device on a real system would require a minimal - * device driver to access the disk controller, but since we have a - * simulator here, we are able to bypass the disk controller and - * access the disk image directly. There are also some things like - * reading the kernel off the disk image into memory that are normally - * taken care of by the console that are now taken care of by the - * simulator. - * - * These shortcuts are acceptable since the system console is - * primarily used doing boot before the kernel has loaded its device - * drivers. - */ -class MipsConsole : public BasicPioDevice -{ - protected: - struct Access : public MipsAccess - { - void serialize(std::ostream &os); - void unserialize(Checkpoint *cp, const std::string §ion); - }; - - union { - Access *mipsAccess; - uint8_t *consoleData; - }; - - /** the disk must be accessed from the console */ - SimpleDisk *disk; - - /** the system terminal is accessable from the console */ - Terminal *terminal; - - /** a pointer to the system we are running in */ - MipsSystem *system; - - /** a pointer to the CPU boot cpu */ - BaseCPU *cpu; - - public: - typedef MipsConsoleParams Params; - MipsConsole(const Params *p); - - const Params * - params() const - { - return dynamic_cast(_params); - } - - virtual void startup(); - - /** - * memory mapped reads and writes - */ - virtual Tick read(PacketPtr pkt); - virtual Tick write(PacketPtr pkt); - - /** - * standard serialization routines for checkpointing - */ - virtual void serialize(std::ostream &os); - virtual void unserialize(Checkpoint *cp, const std::string §ion); -}; - -#endif // __MIPS_CONSOLE_HH__ -- cgit v1.2.3