From 93839380e7dc4799d234843d10329c03d38487fa Mon Sep 17 00:00:00 2001
From: Ali Saidi <saidi@eecs.umich.edu>
Date: Thu, 6 Jul 2006 14:41:01 -0400
Subject: Add default responder to bus Update configuration for new default
responder on bus Update to devices to handle their own pci config space
without pciconfigall Remove most of pciconfigall, it now is a dumbdevice
which gets it's address based on the bus it's supposed to respond for Remove
need for pci config space from platform, add registerPciDevice function to
prevent more than one device from having same bus:dev:func and interrupt
Remove pciconfigspace from pci devices, and py files Add calcConfigAddr that
returns address for config space based on bus/dev/function + offset
configs/test/fs.py:
Update configuration for new default responder on bus
src/dev/ide_ctrl.cc:
src/dev/ide_ctrl.hh:
src/dev/ns_gige.cc:
src/dev/ns_gige.hh:
src/dev/pcidev.cc:
src/dev/pcidev.hh:
Update to handle it's own pci config space without pciconfigall
src/dev/io_device.cc:
src/dev/io_device.hh:
change naming for pio port
break out recvTiming into two functions to reuse code
src/dev/pciconfigall.cc:
src/dev/pciconfigall.hh:
removing most of pciconfigall, it now is a dumbdevice which gets it's address based on the bus it's supposed to respond for
src/dev/pcireg.h:
add a max size for PCI config space (per PCI spec)
src/dev/platform.cc:
src/dev/platform.hh:
remove need for pci config space from platform, add registerPciDevice function to prevent more than one device from having same
bus:dev:func and interrupt
src/dev/sinic.cc:
remove pciconfigspace as it's no longer a needed parameter
src/dev/tsunami.cc:
src/dev/tsunami.hh:
src/dev/tsunami_pchip.cc:
src/dev/tsunami_pchip.hh:
add calcConfigAddr that returns address for config space based on bus/dev/function + offset (per PCI spec)
src/mem/bus.cc:
src/mem/bus.hh:
src/python/m5/objects/Bus.py:
add idea of default responder to bus
src/python/m5/objects/Pci.py:
add config port for pci devices
add latency, bus and size parameters for pci config all (min is 8MB, max is 256MB see pci spec)
--HG--
extra : convert_revision : 99db43b0a3a077f86611d6eaff6664a3885da7c9
---
src/dev/platform.hh | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
(limited to 'src/dev/platform.hh')
diff --git a/src/dev/platform.hh b/src/dev/platform.hh
index 0e6f4ba4a..1940dcad6 100644
--- a/src/dev/platform.hh
+++ b/src/dev/platform.hh
@@ -37,6 +37,9 @@
#ifndef __DEV_PLATFORM_HH__
#define __DEV_PLATFORM_HH__
+#include <bitset>
+#include <set>
+
#include "sim/sim_object.hh"
#include "arch/isa_traits.hh"
@@ -52,9 +55,6 @@ class Platform : public SimObject
/** Pointer to the interrupt controller */
IntrControl *intrctrl;
- /** Pointer to the PCI configuration space */
- PciConfigAll *pciconfig;
-
/** Pointer to the UART, set by the uart */
Uart *uart;
@@ -64,13 +64,20 @@ class Platform : public SimObject
public:
Platform(const std::string &name, IntrControl *intctrl);
virtual ~Platform();
- virtual void init() { if (pciconfig == NULL) panic("PCI Config not set"); }
virtual void postConsoleInt() = 0;
virtual void clearConsoleInt() = 0;
virtual Tick intrFrequency() = 0;
virtual void postPciInt(int line);
virtual void clearPciInt(int line);
virtual Addr pciToDma(Addr pciAddr) const;
+ virtual Addr calcConfigAddr(int bus, int dev, int func) = 0;
+ virtual void registerPciDevice(uint8_t bus, uint8_t dev, uint8_t func,
+ uint8_t intr);
+
+ private:
+ std::bitset<256> intLines;
+ std::set<uint32_t> pciDevices;
+
};
#endif // __DEV_PLATFORM_HH__
--
cgit v1.2.3