From e533fad711fce66bf2e4a6669baeb8eaf02799e1 Mon Sep 17 00:00:00 2001
From: Steve Reinhardt <stever@eecs.umich.edu>
Date: Fri, 26 May 2006 14:17:33 -0400
Subject: Significant rework of Packet class interface: - new constructor
 guarantees initialization of most fields - flags track status of
 non-guaranteed fields (addr, size, src) - accessor functions (getAddr() etc.)
 check status on access - Command & Result classes are nested in Packet class
 scope - Command now built from vector of behavior bits - string version of
 Command for tracing - reinitFromRequest() and makeTimingResponse()
 encapsulate common manipulations of existing packets

src/cpu/simple/atomic.cc:
src/cpu/simple/base.cc:
src/cpu/simple/timing.cc:
src/dev/alpha_console.cc:
src/dev/ide_ctrl.cc:
src/dev/io_device.cc:
src/dev/io_device.hh:
src/dev/isa_fake.cc:
src/dev/ns_gige.cc:
src/dev/pciconfigall.cc:
src/dev/sinic.cc:
src/dev/tsunami_cchip.cc:
src/dev/tsunami_io.cc:
src/dev/tsunami_pchip.cc:
src/dev/uart8250.cc:
src/mem/bus.cc:
src/mem/bus.hh:
src/mem/physical.cc:
src/mem/port.cc:
src/mem/port.hh:
src/mem/request.hh:
    Update for new Packet interface.

--HG--
extra : convert_revision : 9973d09ea4fa61795f23772a7d3995fa4df5c269
---
 src/dev/uart8250.cc | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

(limited to 'src/dev/uart8250.cc')

diff --git a/src/dev/uart8250.cc b/src/dev/uart8250.cc
index a4b30cf25..8e6843841 100644
--- a/src/dev/uart8250.cc
+++ b/src/dev/uart8250.cc
@@ -110,12 +110,12 @@ Uart8250::Uart8250(Params *p)
 Tick
 Uart8250::read(Packet *pkt)
 {
-    assert(pkt->result == Unknown);
-    assert(pkt->addr >= pioAddr && pkt->addr < pioAddr + pioSize);
-    assert(pkt->size == 1);
+    assert(pkt->result == Packet::Unknown);
+    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
+    assert(pkt->getSize() == 1);
 
     pkt->time += pioDelay;
-    Addr daddr = pkt->addr - pioAddr;
+    Addr daddr = pkt->getAddr() - pioAddr;
     pkt->allocate();
 
     DPRINTF(Uart, " read register %#x\n", daddr);
@@ -186,7 +186,7 @@ Uart8250::read(Packet *pkt)
 /*    uint32_t d32 = *data;
     DPRINTF(Uart, "Register read to register %#x returned %#x\n", daddr, d32);
 */
-    pkt->result = Success;
+    pkt->result = Packet::Success;
     return pioDelay;
 }
 
@@ -194,12 +194,12 @@ Tick
 Uart8250::write(Packet *pkt)
 {
 
-    assert(pkt->result == Unknown);
-    assert(pkt->addr >= pioAddr && pkt->addr < pioAddr + pioSize);
-    assert(pkt->size == 1);
+    assert(pkt->result == Packet::Unknown);
+    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
+    assert(pkt->getSize() == 1);
 
     pkt->time += pioDelay;
-    Addr daddr = pkt->addr - pioAddr;
+    Addr daddr = pkt->getAddr() - pioAddr;
 
     DPRINTF(Uart, " write register %#x value %#x\n", daddr, pkt->get<uint8_t>());
 
@@ -264,7 +264,7 @@ Uart8250::write(Packet *pkt)
             panic("Tried to access a UART port that doesn't exist\n");
             break;
     }
-    pkt->result = Success;
+    pkt->result = Packet::Success;
     return pioDelay;
 }
 
-- 
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