From 70e99e0b915fa7ed9ac682af6f68f077799ddea7 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Tue, 21 Aug 2012 05:50:03 -0400 Subject: Device: Remove overloaded pio_latency parameter This patch removes the overloading of the parameter, which seems both redundant, and possibly incorrect. The PciConfigAll now also uses a Param.Latency rather than a Param.Tick. For backwards compatibility it still sets the pio_latency to 1 tick. All the comments have also been updated to not state that it is in simticks when it is not necessarily the case. --- src/dev/x86/I8042.py | 1 - 1 file changed, 1 deletion(-) (limited to 'src/dev/x86/I8042.py') diff --git a/src/dev/x86/I8042.py b/src/dev/x86/I8042.py index 31192adcd..57bf32ca0 100644 --- a/src/dev/x86/I8042.py +++ b/src/dev/x86/I8042.py @@ -34,7 +34,6 @@ from X86IntPin import X86IntSourcePin class I8042(BasicPioDevice): type = 'I8042' cxx_class = 'X86ISA::I8042' - pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks") # This isn't actually used for anything here. pio_addr = 0x0 data_port = Param.Addr('Data port address') -- cgit v1.2.3