From 2a740aa09682c32eb8f1f8880f279c943d8c6ee1 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Mon, 15 Oct 2012 08:12:35 -0400 Subject: Port: Add protocol-agnostic ports in the port hierarchy This patch adds an additional level of ports in the inheritance hierarchy, separating out the protocol-specific and protocl-agnostic parts. All the functionality related to the binding of ports is now confined to use BaseMaster/BaseSlavePorts, and all the protocol-specific parts stay in the Master/SlavePort. In the future it will be possible to add other protocol-specific implementations. The functions used in the binding of ports, i.e. getMaster/SlavePort now use the base classes, and the index parameter is updated to use the PortID typedef with the symbolic InvalidPortID as the default. --- src/dev/x86/i82094aa.hh | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/dev/x86') diff --git a/src/dev/x86/i82094aa.hh b/src/dev/x86/i82094aa.hh index 76a8f9c00..f5e292baa 100644 --- a/src/dev/x86/i82094aa.hh +++ b/src/dev/x86/i82094aa.hh @@ -120,7 +120,8 @@ class I82094AA : public PioDevice, public IntDev void writeReg(uint8_t offset, uint32_t value); uint32_t readReg(uint8_t offset); - MasterPort &getMasterPort(const std::string &if_name, int idx = -1) + BaseMasterPort &getMasterPort(const std::string &if_name, + PortID idx = InvalidPortID) { if (if_name == "int_master") return intMasterPort; -- cgit v1.2.3