From 70e99e0b915fa7ed9ac682af6f68f077799ddea7 Mon Sep 17 00:00:00 2001
From: Andreas Hansson <andreas.hansson@arm.com>
Date: Tue, 21 Aug 2012 05:50:03 -0400
Subject: Device: Remove overloaded pio_latency parameter

This patch removes the overloading of the parameter, which seems both
redundant, and possibly incorrect.

The PciConfigAll now also uses a Param.Latency rather than a
Param.Tick. For backwards compatibility it still sets the pio_latency
to 1 tick. All the comments have also been updated to not state that
it is in simticks when it is not necessarily the case.
---
 src/dev/x86/Cmos.py        | 1 -
 src/dev/x86/I8042.py       | 1 -
 src/dev/x86/I82094AA.py    | 2 --
 src/dev/x86/I8237.py       | 1 -
 src/dev/x86/I8254.py       | 1 -
 src/dev/x86/I8259.py       | 1 -
 src/dev/x86/PcSpeaker.py   | 1 -
 src/dev/x86/SouthBridge.py | 1 -
 8 files changed, 9 deletions(-)

(limited to 'src/dev/x86')

diff --git a/src/dev/x86/Cmos.py b/src/dev/x86/Cmos.py
index 0e09d417b..266fb8937 100644
--- a/src/dev/x86/Cmos.py
+++ b/src/dev/x86/Cmos.py
@@ -36,6 +36,5 @@ class Cmos(BasicPioDevice):
     cxx_class='X86ISA::Cmos'
     time = Param.Time('01/01/2012',
         "System time to use ('Now' for actual time)")
-    pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
     int_pin = Param.X86IntSourcePin(X86IntSourcePin(),
             'Pin to signal RTC alarm interrupts to')
diff --git a/src/dev/x86/I8042.py b/src/dev/x86/I8042.py
index 31192adcd..57bf32ca0 100644
--- a/src/dev/x86/I8042.py
+++ b/src/dev/x86/I8042.py
@@ -34,7 +34,6 @@ from X86IntPin import X86IntSourcePin
 class I8042(BasicPioDevice):
     type = 'I8042'
     cxx_class = 'X86ISA::I8042'
-    pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
     # This isn't actually used for anything here.
     pio_addr = 0x0
     data_port = Param.Addr('Data port address')
diff --git a/src/dev/x86/I82094AA.py b/src/dev/x86/I82094AA.py
index 09923f6c2..3b076a9d6 100644
--- a/src/dev/x86/I82094AA.py
+++ b/src/dev/x86/I82094AA.py
@@ -35,8 +35,6 @@ class I82094AA(BasicPioDevice):
     type = 'I82094AA'
     cxx_class = 'X86ISA::I82094AA'
     apic_id = Param.Int(1, 'APIC id for this IO APIC')
-    pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
-    pio_addr = Param.Addr("Device address")
     int_master = MasterPort("Port for sending interrupt messages")
     int_latency = Param.Latency('1ns', \
             "Latency for an interrupt to propagate through this device.")
diff --git a/src/dev/x86/I8237.py b/src/dev/x86/I8237.py
index 20788a164..0121c3d24 100644
--- a/src/dev/x86/I8237.py
+++ b/src/dev/x86/I8237.py
@@ -33,4 +33,3 @@ from Device import BasicPioDevice
 class I8237(BasicPioDevice):
     type = 'I8237'
     cxx_class = 'X86ISA::I8237'
-    pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
diff --git a/src/dev/x86/I8254.py b/src/dev/x86/I8254.py
index f468717cc..6fdcb1c8d 100644
--- a/src/dev/x86/I8254.py
+++ b/src/dev/x86/I8254.py
@@ -34,6 +34,5 @@ from X86IntPin import X86IntSourcePin
 class I8254(BasicPioDevice):
     type = 'I8254'
     cxx_class = 'X86ISA::I8254'
-    pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
     int_pin = Param.X86IntSourcePin(X86IntSourcePin(),
             'Pin to signal timer interrupts to')
diff --git a/src/dev/x86/I8259.py b/src/dev/x86/I8259.py
index 0a516d30a..30ea14225 100644
--- a/src/dev/x86/I8259.py
+++ b/src/dev/x86/I8259.py
@@ -40,7 +40,6 @@ class X86I8259CascadeMode(Enum):
 class I8259(BasicPioDevice):
     type = 'I8259'
     cxx_class='X86ISA::I8259'
-    pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
     output = Param.X86IntSourcePin(X86IntSourcePin(),
             'The pin this I8259 drives')
     mode = Param.X86I8259CascadeMode('How this I8259 is cascaded')
diff --git a/src/dev/x86/PcSpeaker.py b/src/dev/x86/PcSpeaker.py
index 7ca62ec1e..cc1f5517a 100644
--- a/src/dev/x86/PcSpeaker.py
+++ b/src/dev/x86/PcSpeaker.py
@@ -33,5 +33,4 @@ from Device import BasicPioDevice
 class PcSpeaker(BasicPioDevice):
     type = 'PcSpeaker'
     cxx_class = 'X86ISA::Speaker'
-    pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
     i8254 = Param.I8254('Timer that drives the speaker')
diff --git a/src/dev/x86/SouthBridge.py b/src/dev/x86/SouthBridge.py
index 87f4c3798..7ac208d5e 100644
--- a/src/dev/x86/SouthBridge.py
+++ b/src/dev/x86/SouthBridge.py
@@ -45,7 +45,6 @@ def x86IOAddress(port):
 
 class SouthBridge(SimObject):
     type = 'SouthBridge'
-    pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
     platform = Param.Platform(Parent.any, "Platform this device is part of")
 
     _pic1 = I8259(pio_addr=x86IOAddress(0x20), mode='I8259Master')
-- 
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