From 2a740aa09682c32eb8f1f8880f279c943d8c6ee1 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Mon, 15 Oct 2012 08:12:35 -0400 Subject: Port: Add protocol-agnostic ports in the port hierarchy This patch adds an additional level of ports in the inheritance hierarchy, separating out the protocol-specific and protocl-agnostic parts. All the functionality related to the binding of ports is now confined to use BaseMaster/BaseSlavePorts, and all the protocol-specific parts stay in the Master/SlavePort. In the future it will be possible to add other protocol-specific implementations. The functions used in the binding of ports, i.e. getMaster/SlavePort now use the base classes, and the index parameter is updated to use the PortID typedef with the symbolic InvalidPortID as the default. --- src/dev/copy_engine.cc | 6 +++--- src/dev/copy_engine.hh | 6 +++--- src/dev/dma_device.cc | 4 ++-- src/dev/dma_device.hh | 4 ++-- src/dev/io_device.cc | 4 ++-- src/dev/io_device.hh | 3 ++- src/dev/pcidev.hh | 3 ++- src/dev/x86/i82094aa.hh | 3 ++- 8 files changed, 18 insertions(+), 15 deletions(-) (limited to 'src/dev') diff --git a/src/dev/copy_engine.cc b/src/dev/copy_engine.cc index 77cc735a9..799e9f96a 100644 --- a/src/dev/copy_engine.cc +++ b/src/dev/copy_engine.cc @@ -110,8 +110,8 @@ CopyEngine::CopyEngineChannel::~CopyEngineChannel() delete [] copyBuffer; } -MasterPort & -CopyEngine::getMasterPort(const std::string &if_name, int idx) +BaseMasterPort & +CopyEngine::getMasterPort(const std::string &if_name, PortID idx) { if (if_name != "dma") { // pass it along to our super class @@ -126,7 +126,7 @@ CopyEngine::getMasterPort(const std::string &if_name, int idx) } -MasterPort & +BaseMasterPort & CopyEngine::CopyEngineChannel::getMasterPort() { return cePort; diff --git a/src/dev/copy_engine.hh b/src/dev/copy_engine.hh index 28fc6315c..41b4a631e 100644 --- a/src/dev/copy_engine.hh +++ b/src/dev/copy_engine.hh @@ -94,7 +94,7 @@ class CopyEngine : public PciDev public: CopyEngineChannel(CopyEngine *_ce, int cid); virtual ~CopyEngineChannel(); - MasterPort &getMasterPort(); + BaseMasterPort &getMasterPort(); std::string name() { assert(ce); return ce->name() + csprintf("-chan%d", channelId); } virtual Tick read(PacketPtr pkt) @@ -196,8 +196,8 @@ class CopyEngine : public PciDev void regStats(); - virtual MasterPort &getMasterPort(const std::string &if_name, - int idx = -1); + virtual BaseMasterPort &getMasterPort(const std::string &if_name, + PortID idx = InvalidPortID); virtual Tick read(PacketPtr pkt); virtual Tick write(PacketPtr pkt); diff --git a/src/dev/dma_device.cc b/src/dev/dma_device.cc index c64694315..43d45146f 100644 --- a/src/dev/dma_device.cc +++ b/src/dev/dma_device.cc @@ -254,8 +254,8 @@ DmaPort::sendDma() panic("Unknown memory mode."); } -MasterPort & -DmaDevice::getMasterPort(const std::string &if_name, int idx) +BaseMasterPort & +DmaDevice::getMasterPort(const std::string &if_name, PortID idx) { if (if_name == "dma") { return dmaPort; diff --git a/src/dev/dma_device.hh b/src/dev/dma_device.hh index 48c3f9c61..c46fbfd76 100644 --- a/src/dev/dma_device.hh +++ b/src/dev/dma_device.hh @@ -156,8 +156,8 @@ class DmaDevice : public PioDevice unsigned cacheBlockSize() const { return dmaPort.cacheBlockSize(); } - virtual MasterPort &getMasterPort(const std::string &if_name, - int idx = -1); + virtual BaseMasterPort &getMasterPort(const std::string &if_name, + PortID idx = InvalidPortID); friend class DmaPort; }; diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc index 30779cfb4..0cc1324f5 100644 --- a/src/dev/io_device.cc +++ b/src/dev/io_device.cc @@ -79,8 +79,8 @@ PioDevice::init() pioPort.sendRangeChange(); } -SlavePort & -PioDevice::getSlavePort(const std::string &if_name, int idx) +BaseSlavePort & +PioDevice::getSlavePort(const std::string &if_name, PortID idx) { if (if_name == "pio") { return pioPort; diff --git a/src/dev/io_device.hh b/src/dev/io_device.hh index 260053169..bd6a26d14 100644 --- a/src/dev/io_device.hh +++ b/src/dev/io_device.hh @@ -127,7 +127,8 @@ class PioDevice : public MemObject virtual unsigned int drain(Event *de); - virtual SlavePort &getSlavePort(const std::string &if_name, int idx = -1); + virtual BaseSlavePort &getSlavePort(const std::string &if_name, + PortID idx = InvalidPortID); friend class PioPort; diff --git a/src/dev/pcidev.hh b/src/dev/pcidev.hh index 51d2cc93e..9994d2a2d 100644 --- a/src/dev/pcidev.hh +++ b/src/dev/pcidev.hh @@ -218,7 +218,8 @@ class PciDev : public DmaDevice virtual unsigned int drain(Event *de); - virtual SlavePort &getSlavePort(const std::string &if_name, int idx = -1) + virtual BaseSlavePort &getSlavePort(const std::string &if_name, + PortID idx = InvalidPortID) { if (if_name == "config") { return configPort; diff --git a/src/dev/x86/i82094aa.hh b/src/dev/x86/i82094aa.hh index 76a8f9c00..f5e292baa 100644 --- a/src/dev/x86/i82094aa.hh +++ b/src/dev/x86/i82094aa.hh @@ -120,7 +120,8 @@ class I82094AA : public PioDevice, public IntDev void writeReg(uint8_t offset, uint32_t value); uint32_t readReg(uint8_t offset); - MasterPort &getMasterPort(const std::string &if_name, int idx = -1) + BaseMasterPort &getMasterPort(const std::string &if_name, + PortID idx = InvalidPortID) { if (if_name == "int_master") return intMasterPort; -- cgit v1.2.3