From 6ad5f1516e889d30566851e3ffaa7dad0b14b8ff Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 11 Sep 2019 14:44:09 -0700 Subject: x86: Simplify and consolidate the code that assembles an MSI on x86. There is no interrupt response message, and so no need for a function which would construct one. The other functions which construct the request can be consolidated since the work being done by each is incremental. The template parameters can be used to support multiple types and offsets in a single function, and since that function also doesn't have to do much work, it makes sense to do everything in one shot. Change-Id: I41b202a263a697c5ada6817f3ab2a4728281b894 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20826 Maintainer: Gabe Black Tested-by: kokoro Reviewed-by: Brandon Potter --- src/dev/x86/intdev.hh | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/dev') diff --git a/src/dev/x86/intdev.hh b/src/dev/x86/intdev.hh index 274873370..052928043 100644 --- a/src/dev/x86/intdev.hh +++ b/src/dev/x86/intdev.hh @@ -115,7 +115,8 @@ class IntMasterPort : public QueuedMasterPort sendMessage(X86ISA::ApicList apics, TriggerIntMessage message, bool timing) { for (auto id: apics) { - PacketPtr pkt = buildIntRequest(id, message); + Addr addr = x86InterruptAddress(id, TriggerIntOffset); + PacketPtr pkt = buildIntPacket(addr, message); if (timing) { schedTimingReq(pkt, curTick() + latency); // The target handles cleaning up the packet in timing mode. -- cgit v1.2.3