From f85286b3debf4a4a94d3b959e5bb880be81bd692 Mon Sep 17 00:00:00 2001
From: Andreas Hansson <andreas.hansson@arm.com>
Date: Tue, 17 Jan 2012 12:55:08 -0600
Subject: MEM: Add port proxies instead of non-structural ports

Port proxies are used to replace non-structural ports, and thus enable
all ports in the system to correspond to a structural entity. This has
the advantage of accessing memory through the normal memory subsystem
and thus allowing any constellation of distributed memories, address
maps, etc. Most accesses are done through the "system port" that is
used for loading binaries, debugging etc. For the entities that belong
to the CPU, e.g. threads and thread contexts, they wrap the CPU data
port in a port proxy.

The following replacements are made:
FunctionalPort      > PortProxy
TranslatingPort     > SETranslatingPortProxy
VirtualPort         > FSTranslatingPortProxy

--HG--
rename : src/mem/vport.cc => src/mem/fs_translating_port_proxy.cc
rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh
rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc
rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
---
 src/dev/simple_disk.cc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/dev')

diff --git a/src/dev/simple_disk.cc b/src/dev/simple_disk.cc
index 4bf24b1cd..9cec638b8 100644
--- a/src/dev/simple_disk.cc
+++ b/src/dev/simple_disk.cc
@@ -46,7 +46,7 @@
 #include "debug/SimpleDiskData.hh"
 #include "dev/disk_image.hh"
 #include "dev/simple_disk.hh"
-#include "mem/port.hh"
+#include "mem/port_proxy.hh"
 #include "sim/system.hh"
 
 using namespace std;
@@ -70,7 +70,7 @@ SimpleDisk::read(Addr addr, baddr_t block, int count) const
     for (int i = 0, j = 0; i < count; i += SectorSize, j++)
         image->read(data + i, block + j);
 
-    system->functionalPort->writeBlob(addr, data, count);
+    system->physProxy->writeBlob(addr, data, count);
 
     DPRINTF(SimpleDisk, "read  block=%#x len=%d\n", (uint64_t)block, count);
     DDUMP(SimpleDiskData, data, count);
-- 
cgit v1.2.3


From de34e49d15b95cc8be51dbed2e98c469e7486959 Mon Sep 17 00:00:00 2001
From: Andreas Hansson <andreas.hansson@arm.com>
Date: Tue, 17 Jan 2012 12:55:09 -0600
Subject: MEM: Simplify ports by removing EventManager

This patch removes the inheritance of EventManager from the ports and
moves all responsibility for event queues to the owner. Eventually the
event manager should be the interface block, which could either be the
structural owner or a subblock like a LSQ in the O3 CPU for example.
---
 src/dev/io_device.cc | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

(limited to 'src/dev')

diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc
index 00e463de1..9b7b6ec50 100644
--- a/src/dev/io_device.cc
+++ b/src/dev/io_device.cc
@@ -136,7 +136,7 @@ DmaPort::recvTiming(PacketPtr pkt)
         else if (backoffTime < maxBackoffDelay)
             backoffTime <<= 1;
 
-        reschedule(backoffEvent, curTick() + backoffTime, true);
+        device->reschedule(backoffEvent, curTick() + backoffTime, true);
 
         DPRINTF(DMA, "Backoff time set to %d ticks\n", backoffTime);
 
@@ -164,7 +164,8 @@ DmaPort::recvTiming(PacketPtr pkt)
         if (state->totBytes == state->numBytes) {
             if (state->completionEvent) {
                 if (state->delay)
-                    schedule(state->completionEvent, curTick() + state->delay);
+                    device->schedule(state->completionEvent,
+                                     curTick() + state->delay);
                 else
                     state->completionEvent->process();
             }
@@ -234,7 +235,7 @@ DmaPort::recvRetry()
     if (transmitList.size() && backoffTime && !inRetry) {
         DPRINTF(DMA, "Scheduling backoff for %d\n", curTick()+backoffTime);
         if (!backoffEvent.scheduled())
-            schedule(backoffEvent, backoffTime + curTick());
+            device->schedule(backoffEvent, backoffTime + curTick());
     }
     DPRINTF(DMA, "TransmitList: %d, backoffTime: %d inRetry: %d es: %d\n",
             transmitList.size(), backoffTime, inRetry,
@@ -320,7 +321,7 @@ DmaPort::sendDma()
                 !backoffEvent.scheduled()) {
             DPRINTF(DMA, "-- Scheduling backoff timer for %d\n",
                     backoffTime+curTick());
-            schedule(backoffEvent, backoffTime + curTick());
+            device->schedule(backoffEvent, backoffTime + curTick());
         }
     } else if (state == Enums::atomic) {
         transmitList.pop_front();
@@ -342,7 +343,8 @@ DmaPort::sendDma()
         if (state->totBytes == state->numBytes) {
             if (state->completionEvent) {
                 assert(!state->completionEvent->scheduled());
-                schedule(state->completionEvent, curTick() + lat + state->delay);
+                device->schedule(state->completionEvent,
+                                 curTick() + lat + state->delay);
             }
             delete state;
             delete pkt->req;
-- 
cgit v1.2.3


From 07cf9d914b292008ead7021182ec2ef8fc4671f1 Mon Sep 17 00:00:00 2001
From: Andreas Hansson <andreas.hansson@arm.com>
Date: Tue, 17 Jan 2012 12:55:09 -0600
Subject: MEM: Separate queries for snooping and address ranges

This patch simplifies the address-range determination mechanism and
also unifies the naming across ports and devices. It further splits
the queries for determining if a port is snooping and what address
ranges it responds to (aiming towards a separation of
cache-maintenance ports and pure memory-mapped ports). Default
behaviours are such that most ports do not have to define isSnooping,
and master ports need not implement getAddrRanges.
---
 src/dev/arm/gic.cc      | 11 ++++++-----
 src/dev/arm/gic.hh      |  2 +-
 src/dev/arm/pl111.cc    |  9 +++++----
 src/dev/arm/pl111.hh    |  8 +++++---
 src/dev/copy_engine.hh  |  1 -
 src/dev/io_device.cc    | 22 ++++++++++------------
 src/dev/io_device.hh    | 45 ++++++++++++++++++++-------------------------
 src/dev/pciconfigall.cc |  9 +++++----
 src/dev/pciconfigall.hh |  2 +-
 src/dev/pcidev.cc       | 25 +++++++++++++------------
 src/dev/pcidev.hh       | 11 ++++++-----
 src/dev/sinic.cc        |  2 +-
 src/dev/sparc/iob.cc    | 11 ++++++-----
 src/dev/sparc/iob.hh    |  2 +-
 src/dev/uart8250.cc     | 12 +++++-------
 src/dev/uart8250.hh     |  2 +-
 src/dev/x86/i8042.cc    | 11 ++++++-----
 src/dev/x86/i8042.hh    |  2 +-
 src/dev/x86/i82094aa.hh | 20 +++++++++++---------
 src/dev/x86/intdev.cc   |  2 +-
 src/dev/x86/intdev.hh   |  9 ++++-----
 21 files changed, 109 insertions(+), 109 deletions(-)

(limited to 'src/dev')

diff --git a/src/dev/arm/gic.cc b/src/dev/arm/gic.cc
index 2dac18c08..4c45760b8 100644
--- a/src/dev/arm/gic.cc
+++ b/src/dev/arm/gic.cc
@@ -703,12 +703,13 @@ Gic::postInt(uint32_t cpu, Tick when)
         eventq->schedule(postIntEvent[cpu], when);
 }
 
-void
-Gic::addressRanges(AddrRangeList &range_list)
+AddrRangeList
+Gic::getAddrRanges()
 {
-    range_list.clear();
-    range_list.push_back(RangeSize(distAddr, DIST_SIZE));
-    range_list.push_back(RangeSize(cpuAddr, CPU_SIZE));
+    AddrRangeList ranges;
+    ranges.push_back(RangeSize(distAddr, DIST_SIZE));
+    ranges.push_back(RangeSize(cpuAddr, CPU_SIZE));
+    return ranges;
 }
 
 
diff --git a/src/dev/arm/gic.hh b/src/dev/arm/gic.hh
index 4c43db660..6e3f12cdb 100644
--- a/src/dev/arm/gic.hh
+++ b/src/dev/arm/gic.hh
@@ -259,7 +259,7 @@ class Gic : public PioDevice
     /** Return the address ranges used by the Gic
      * This is the distributor address + all cpu addresses
      */
-    virtual void addressRanges(AddrRangeList &range_list);
+    virtual AddrRangeList getAddrRanges();
 
     /** A PIO read to the device, immediately split up into
      * readDistributor() or readCpu()
diff --git a/src/dev/arm/pl111.cc b/src/dev/arm/pl111.cc
index 958f07aa7..263a3b620 100644
--- a/src/dev/arm/pl111.cc
+++ b/src/dev/arm/pl111.cc
@@ -735,11 +735,12 @@ Pl111::generateInterrupt()
     }
 }
 
-void
-Pl111::addressRanges(AddrRangeList& range_list)
+AddrRangeList
+Pl111::getAddrRanges()
 {
-    range_list.clear();
-    range_list.push_back(RangeSize(pioAddr, pioSize));
+    AddrRangeList ranges;
+    ranges.push_back(RangeSize(pioAddr, pioSize));
+    return ranges;
 }
 
 Pl111 *
diff --git a/src/dev/arm/pl111.hh b/src/dev/arm/pl111.hh
index f36dc6810..b2dc1f640 100644
--- a/src/dev/arm/pl111.hh
+++ b/src/dev/arm/pl111.hh
@@ -325,10 +325,12 @@ class Pl111: public AmbaDmaDevice
     virtual void serialize(std::ostream &os);
     virtual void unserialize(Checkpoint *cp, const std::string &section);
 
-    /** return the address ranges that this device responds to.
-     * @param range_list range list to populate with ranges
+    /**
+     * Determine the address ranges that this device responds to.
+     *
+     * @return a list of non-overlapping address ranges
      */
-    void addressRanges(AddrRangeList &range_list);
+    AddrRangeList getAddrRanges();
 };
 
 #endif
diff --git a/src/dev/copy_engine.hh b/src/dev/copy_engine.hh
index dfe469588..581d3c80b 100644
--- a/src/dev/copy_engine.hh
+++ b/src/dev/copy_engine.hh
@@ -85,7 +85,6 @@ class CopyEngine : public PciDev
         void init();
 
         std::string name() { assert(ce); return ce->name() + csprintf("-chan%d", channelId); }
-        virtual void addressRanges(AddrRangeList &range_list) { range_list.clear(); }
         virtual Tick read(PacketPtr pkt)
                         { panic("CopyEngineChannel has no I/O access\n");}
         virtual Tick write(PacketPtr pkt)
diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc
index 9b7b6ec50..6cb7bbed7 100644
--- a/src/dev/io_device.cc
+++ b/src/dev/io_device.cc
@@ -47,13 +47,10 @@ PioPort::recvAtomic(PacketPtr pkt)
     return pkt->isRead() ? device->read(pkt) : device->write(pkt);
 }
 
-void
-PioPort::getDeviceAddressRanges(AddrRangeList &resp, bool &snoop)
+AddrRangeList
+PioPort::getAddrRanges()
 {
-    snoop = false;
-    device->addressRanges(resp);
-    for (AddrRangeIter i = resp.begin(); i != resp.end(); i++)
-         DPRINTF(BusAddrRanges, "Adding Range %#x-%#x\n", i->start, i->end);
+    return device->getAddrRanges();
 }
 
 
@@ -72,7 +69,7 @@ PioDevice::init()
 {
     if (!pioPort)
         panic("Pio port of %s not connected to anything!", name());
-    pioPort->sendStatusChange(Port::RangeChange);
+    pioPort->sendRangeChange();
 }
 
 Port *
@@ -105,13 +102,14 @@ BasicPioDevice::BasicPioDevice(const Params *p)
       pioDelay(p->pio_latency)
 {}
 
-void
-BasicPioDevice::addressRanges(AddrRangeList &range_list)
+AddrRangeList
+BasicPioDevice::getAddrRanges()
 {
     assert(pioSize != 0);
-    range_list.clear();
+    AddrRangeList ranges;
     DPRINTF(BusAddrRanges, "registering range: %#x-%#x\n", pioAddr, pioSize);
-    range_list.push_back(RangeSize(pioAddr, pioSize));
+    ranges.push_back(RangeSize(pioAddr, pioSize));
+    return ranges;
 }
 
 
@@ -121,7 +119,7 @@ DmaPort::DmaPort(MemObject *dev, System *s, Tick min_backoff, Tick max_backoff,
       pendingCount(0), actionInProgress(0), drainEvent(NULL),
       backoffTime(0), minBackoffDelay(min_backoff),
       maxBackoffDelay(max_backoff), inRetry(false), recvSnoops(recv_snoops),
-      snoopRangeSent(false), backoffEvent(this)
+      backoffEvent(this)
 { }
 
 bool
diff --git a/src/dev/io_device.hh b/src/dev/io_device.hh
index 36787c13e..45fd385b9 100644
--- a/src/dev/io_device.hh
+++ b/src/dev/io_device.hh
@@ -51,7 +51,7 @@ class System;
  * The PioPort class is a programmed i/o port that all devices that are
  * sensitive to an address range use. The port takes all the memory
  * access types and roles them into one read() and write() call that the device
- * must respond to. The device must also provide the addressRanges() function
+ * must respond to. The device must also provide getAddrRanges() function
  * with which it returns the address ranges it is interested in.
  */
 class PioPort : public SimpleTimingPort
@@ -62,8 +62,7 @@ class PioPort : public SimpleTimingPort
 
     virtual Tick recvAtomic(PacketPtr pkt);
 
-    virtual void getDeviceAddressRanges(AddrRangeList &resp,
-                                        bool &snoop);
+    virtual AddrRangeList getAddrRanges();
 
   public:
 
@@ -133,9 +132,6 @@ class DmaPort : public Port
     /** Port accesses a cache which requires snooping */
     bool recvSnoops;
 
-    /** Records snoop response so we only reply once to a status change */
-    bool snoopRangeSent;
-
     virtual bool recvTiming(PacketPtr pkt);
     virtual Tick recvAtomic(PacketPtr pkt)
     {
@@ -150,25 +146,16 @@ class DmaPort : public Port
         panic("dma port shouldn't be used for pio access.");
     }
 
-    virtual void recvStatusChange(Status status)
+    virtual void recvRangeChange()
     {
-        if (recvSnoops) {
-            if (status == RangeChange) {
-                if (!snoopRangeSent) {
-                    snoopRangeSent = true;
-                    sendStatusChange(Port::RangeChange);
-                }
-                return;
-            }
-            panic("Unexpected recvStatusChange\n");
-        }
+        // DMA port is a master with a single slave so there is no choice and
+        // thus no need to worry about any address changes
     }
 
     virtual void recvRetry() ;
 
-    virtual void getDeviceAddressRanges(AddrRangeList &resp,
-                                        bool &snoop)
-    { resp.clear(); snoop = recvSnoops; }
+    virtual bool isSnooping()
+    { return recvSnoops; }
 
     void queueDma(PacketPtr pkt, bool front = false);
     void sendDma();
@@ -192,7 +179,7 @@ class DmaPort : public Port
 /**
  * This device is the base class which all devices senstive to an address range
  * inherit from. There are three pure virtual functions which all devices must
- * implement addressRanges(), read(), and write(). The magic do choose which
+ * implement getAddrRanges(), read(), and write(). The magic do choose which
  * mode we are in, etc is handled by the PioPort so the device doesn't have to
  * bother.
  */
@@ -210,7 +197,13 @@ class PioDevice : public MemObject
      * that it sees. */
     PioPort *pioPort;
 
-    virtual void addressRanges(AddrRangeList &range_list) = 0;
+    /**
+     * Every PIO device is obliged to provide an implementation that
+     * returns the address ranges the device responds to.
+     *
+     * @return a list of non-overlapping address ranges
+     */
+    virtual AddrRangeList getAddrRanges() = 0;
 
     /** Pure virtual function that the device must implement. Called
      * when a read command is recieved by the port.
@@ -269,10 +262,12 @@ class BasicPioDevice : public PioDevice
         return dynamic_cast<const Params *>(_params);
     }
 
-    /** return the address ranges that this device responds to.
-     * @param range_list range list to populate with ranges
+    /**
+     * Determine the address ranges that this device responds to.
+     *
+     * @return a list of non-overlapping address ranges
      */
-    void addressRanges(AddrRangeList &range_list);
+    virtual AddrRangeList getAddrRanges();
 
 };
 
diff --git a/src/dev/pciconfigall.cc b/src/dev/pciconfigall.cc
index 55b439857..e7130e11d 100644
--- a/src/dev/pciconfigall.cc
+++ b/src/dev/pciconfigall.cc
@@ -86,11 +86,12 @@ PciConfigAll::write(PacketPtr pkt)
 }
 
 
-void
-PciConfigAll::addressRanges(AddrRangeList &range_list)
+AddrRangeList
+PciConfigAll::getAddrRanges()
 {
-    range_list.clear();
-    range_list.push_back(RangeSize(pioAddr, params()->size));
+    AddrRangeList ranges;
+    ranges.push_back(RangeSize(pioAddr, params()->size));
+    return ranges;
 }
 
 
diff --git a/src/dev/pciconfigall.hh b/src/dev/pciconfigall.hh
index b3f6d1472..e594838fa 100644
--- a/src/dev/pciconfigall.hh
+++ b/src/dev/pciconfigall.hh
@@ -80,7 +80,7 @@ class PciConfigAll : public PioDevice
 
     virtual Tick write(PacketPtr pkt);
 
-    void addressRanges(AddrRangeList &range_list);
+    AddrRangeList getAddrRanges();
 
   private:
     Addr pioAddr;
diff --git a/src/dev/pcidev.cc b/src/dev/pcidev.cc
index 2c7d50e83..c36ac11ba 100644
--- a/src/dev/pcidev.cc
+++ b/src/dev/pcidev.cc
@@ -72,13 +72,13 @@ PciDev::PciConfigPort::recvAtomic(PacketPtr pkt)
     return pkt->isRead() ? device->readConfig(pkt) : device->writeConfig(pkt);
 }
 
-void
-PciDev::PciConfigPort::getDeviceAddressRanges(AddrRangeList &resp,
-                                              bool &snoop)
+AddrRangeList
+PciDev::PciConfigPort::getAddrRanges()
 {
-    snoop = false;;
+    AddrRangeList ranges;
     if (configAddr != ULL(-1))
-        resp.push_back(RangeSize(configAddr, PCI_CONFIG_SIZE+1));
+        ranges.push_back(RangeSize(configAddr, PCI_CONFIG_SIZE+1));
+    return ranges;
 }
 
 
@@ -152,7 +152,7 @@ PciDev::init()
 {
     if (!configPort)
         panic("pci config port not connected to anything!");
-   configPort->sendStatusChange(Port::RangeChange);
+   configPort->sendRangeChange();
    PioDevice::init();
 }
 
@@ -207,14 +207,15 @@ PciDev::readConfig(PacketPtr pkt)
 
 }
 
-void
-PciDev::addressRanges(AddrRangeList &range_list)
+AddrRangeList
+PciDev::getAddrRanges()
 {
+    AddrRangeList ranges;
     int x = 0;
-    range_list.clear();
     for (x = 0; x < 6; x++)
         if (BARAddrs[x] != 0)
-            range_list.push_back(RangeSize(BARAddrs[x],BARSize[x]));
+            ranges.push_back(RangeSize(BARAddrs[x],BARSize[x]));
+    return ranges;
 }
 
 Tick
@@ -301,7 +302,7 @@ PciDev::writeConfig(PacketPtr pkt)
                             BARAddrs[barnum] = BAR_IO_SPACE(he_old_bar) ?
                                 platform->calcPciIOAddr(he_new_bar) :
                                 platform->calcPciMemAddr(he_new_bar);
-                            pioPort->sendStatusChange(Port::RangeChange);
+                            pioPort->sendRangeChange();
                         }
                     }
                     config.baseAddr[barnum] = htole((he_new_bar & ~bar_mask) |
@@ -354,7 +355,7 @@ PciDev::unserialize(Checkpoint *cp, const std::string &section)
     UNSERIALIZE_ARRAY(BARAddrs, sizeof(BARAddrs) / sizeof(BARAddrs[0]));
     UNSERIALIZE_ARRAY(config.data,
                       sizeof(config.data) / sizeof(config.data[0]));
-    pioPort->sendStatusChange(Port::RangeChange);
+    pioPort->sendRangeChange();
 
 }
 
diff --git a/src/dev/pcidev.hh b/src/dev/pcidev.hh
index 5da8b2dfc..4c3ecc594 100644
--- a/src/dev/pcidev.hh
+++ b/src/dev/pcidev.hh
@@ -65,8 +65,7 @@ class PciDev : public DmaDevice
 
         virtual Tick recvAtomic(PacketPtr pkt);
 
-        virtual void getDeviceAddressRanges(AddrRangeList &resp,
-                                            bool &snoop);
+        virtual AddrRangeList getAddrRanges();
 
         Platform *platform;
 
@@ -187,10 +186,12 @@ class PciDev : public DmaDevice
     interruptLine()
     { return letoh(config.interruptLine); }
 
-    /** return the address ranges that this device responds to.
-     * @params range_list range list to populate with ranges
+    /**
+     * Determine the address ranges that this device responds to.
+     *
+     * @return a list of non-overlapping address ranges
      */
-    void addressRanges(AddrRangeList &range_list);
+    AddrRangeList getAddrRanges();
 
     /**
      * Constructor for PCI Dev. This function copies data from the
diff --git a/src/dev/sinic.cc b/src/dev/sinic.cc
index b87dfa704..741442918 100644
--- a/src/dev/sinic.cc
+++ b/src/dev/sinic.cc
@@ -1714,7 +1714,7 @@ Device::unserialize(Checkpoint *cp, const std::string &section)
     if (transmitTick)
         schedule(txEvent, curTick() + transmitTick);
 
-    pioPort->sendStatusChange(Port::RangeChange);
+    pioPort->sendRangeChange();
 
 }
 
diff --git a/src/dev/sparc/iob.cc b/src/dev/sparc/iob.cc
index 748a08c81..e7947dcdf 100644
--- a/src/dev/sparc/iob.cc
+++ b/src/dev/sparc/iob.cc
@@ -325,12 +325,13 @@ Iob::receiveJBusInterrupt(int cpu_id, int source, uint64_t d0, uint64_t d1)
     return true;
 }
 
-void
-Iob::addressRanges(AddrRangeList &range_list)
+AddrRangeList
+Iob::getAddrRanges()
 {
-    range_list.clear();
-    range_list.push_back(RangeSize(iobManAddr, iobManSize));
-    range_list.push_back(RangeSize(iobJBusAddr, iobJBusSize));
+    AddrRangeList ranges;
+    ranges.push_back(RangeSize(iobManAddr, iobManSize));
+    ranges.push_back(RangeSize(iobJBusAddr, iobJBusSize));
+    return ranges;
 }
 
 
diff --git a/src/dev/sparc/iob.hh b/src/dev/sparc/iob.hh
index 7391b1ccd..d6a47ce19 100644
--- a/src/dev/sparc/iob.hh
+++ b/src/dev/sparc/iob.hh
@@ -141,7 +141,7 @@ class Iob : public PioDevice
     bool receiveJBusInterrupt(int cpu_id, int source, uint64_t d0,
                               uint64_t d1);
 
-    void addressRanges(AddrRangeList &range_list);
+    AddrRangeList getAddrRanges();
 
     virtual void serialize(std::ostream &os);
     virtual void unserialize(Checkpoint *cp, const std::string &section);
diff --git a/src/dev/uart8250.cc b/src/dev/uart8250.cc
index 877e9fb47..671d5505f 100644
--- a/src/dev/uart8250.cc
+++ b/src/dev/uart8250.cc
@@ -286,16 +286,14 @@ Uart8250::dataAvailable()
 
 }
 
-void
-Uart8250::addressRanges(AddrRangeList &range_list)
+AddrRangeList
+Uart8250::getAddrRanges()
 {
-    assert(pioSize != 0);
-    range_list.clear();
-    range_list.push_back(RangeSize(pioAddr, pioSize));
+    AddrRangeList ranges;
+    ranges.push_back(RangeSize(pioAddr, pioSize));
+    return ranges;
 }
 
-
-
 void
 Uart8250::serialize(ostream &os)
 {
diff --git a/src/dev/uart8250.hh b/src/dev/uart8250.hh
index 79c31d5cf..f31def2ea 100644
--- a/src/dev/uart8250.hh
+++ b/src/dev/uart8250.hh
@@ -100,7 +100,7 @@ class Uart8250 : public Uart
 
     virtual Tick read(PacketPtr pkt);
     virtual Tick write(PacketPtr pkt);
-    virtual void addressRanges(AddrRangeList &range_list);
+    virtual AddrRangeList getAddrRanges();
 
     /**
      * Inform the uart that there is data available.
diff --git a/src/dev/x86/i8042.cc b/src/dev/x86/i8042.cc
index a0786c95c..746a08778 100644
--- a/src/dev/x86/i8042.cc
+++ b/src/dev/x86/i8042.cc
@@ -43,12 +43,13 @@ const uint8_t CommandAck = 0xfa;
 const uint8_t CommandNack = 0xfe;
 const uint8_t BatSuccessful = 0xaa;
 
-void
-X86ISA::I8042::addressRanges(AddrRangeList &range_list)
+AddrRangeList
+X86ISA::I8042::getAddrRanges()
 {
-    range_list.clear();
-    range_list.push_back(RangeSize(dataPort, 1));
-    range_list.push_back(RangeSize(commandPort, 1));
+    AddrRangeList ranges;
+    ranges.push_back(RangeSize(dataPort, 1));
+    ranges.push_back(RangeSize(commandPort, 1));
+    return ranges;
 }
 
 void
diff --git a/src/dev/x86/i8042.hh b/src/dev/x86/i8042.hh
index be12c4e96..61220b45d 100644
--- a/src/dev/x86/i8042.hh
+++ b/src/dev/x86/i8042.hh
@@ -255,7 +255,7 @@ class I8042 : public BasicPioDevice
         commandByte.keyboardFullInt = 1;
     }
 
-    void addressRanges(AddrRangeList &range_list);
+    AddrRangeList getAddrRanges();
 
     Tick read(PacketPtr pkt);
 
diff --git a/src/dev/x86/i82094aa.hh b/src/dev/x86/i82094aa.hh
index ae0322d94..0bcf8973d 100644
--- a/src/dev/x86/i82094aa.hh
+++ b/src/dev/x86/i82094aa.hh
@@ -103,19 +103,21 @@ class I82094AA : public PioDevice, public IntDev
     Tick read(PacketPtr pkt);
     Tick write(PacketPtr pkt);
 
-    void addressRanges(AddrRangeList &range_list)
+    AddrRangeList getAddrRanges()
     {
-        range_list.clear();
-        range_list.push_back(RangeEx(pioAddr, pioAddr + 4));
-        range_list.push_back(RangeEx(pioAddr + 16, pioAddr + 20));
+        AddrRangeList ranges;
+        ranges.push_back(RangeEx(pioAddr, pioAddr + 4));
+        ranges.push_back(RangeEx(pioAddr + 16, pioAddr + 20));
+        return ranges;
     }
 
-    void getIntAddrRange(AddrRangeList &range_list)
+    AddrRangeList getIntAddrRange()
     {
-        range_list.clear();
-        range_list.push_back(RangeEx(x86InterruptAddress(initialApicId, 0),
-                    x86InterruptAddress(initialApicId, 0) +
-                    PhysAddrAPICRangeSize));
+        AddrRangeList ranges;
+        ranges.push_back(RangeEx(x86InterruptAddress(initialApicId, 0),
+                                 x86InterruptAddress(initialApicId, 0) +
+                                 PhysAddrAPICRangeSize));
+        return ranges;
     }
 
     void writeReg(uint8_t offset, uint32_t value);
diff --git a/src/dev/x86/intdev.cc b/src/dev/x86/intdev.cc
index 0c0fa73cf..a991005bc 100644
--- a/src/dev/x86/intdev.cc
+++ b/src/dev/x86/intdev.cc
@@ -54,7 +54,7 @@ X86ISA::IntDev::init()
     if (!intPort) {
         panic("Int port not connected to anything!");
     }
-    intPort->sendStatusChange(Port::RangeChange);
+    intPort->sendRangeChange();
 }
 
 X86ISA::IntSourcePin *
diff --git a/src/dev/x86/intdev.hh b/src/dev/x86/intdev.hh
index 1b3efdbb5..9713d042b 100644
--- a/src/dev/x86/intdev.hh
+++ b/src/dev/x86/intdev.hh
@@ -63,10 +63,9 @@ class IntDev
         {
         }
 
-        void getDeviceAddressRanges(AddrRangeList &resp, bool &snoop)
+        AddrRangeList getAddrRanges()
         {
-            snoop = false;
-            device->getIntAddrRange(resp);
+            return device->getIntAddrRange();
         }
 
         Tick recvMessage(PacketPtr pkt)
@@ -134,8 +133,8 @@ class IntDev
         return 0;
     }
 
-    virtual void
-    getIntAddrRange(AddrRangeList &range_list)
+    virtual AddrRangeList
+    getIntAddrRange()
     {
         panic("intAddrRange not implemented.\n");
     }
-- 
cgit v1.2.3


From 2208ea049f60618e432c69c065926bcbc810581a Mon Sep 17 00:00:00 2001
From: Andreas Hansson <andreas.hansson@arm.com>
Date: Tue, 17 Jan 2012 12:55:09 -0600
Subject: MEM: Make the bus bridge unidirectional and fixed address range

This patch makes the bus bridge uni-directional and specialises the
bus ports to be a master port and a slave port. This greatly
simplifies the assumptions on both sides as either port only has to
deal with requests or responses. The following patches introduce the
notion of master and slave ports, and would not be possible without
this split of responsibilities.

In making the bridge unidirectional, the address range mechanism of
the bridge is also changed. For the cases where communication is
taking place both ways, an additional bridge is needed. This causes
issues with the existing mechanism, as the busses cannot determine
when to stop iterating the address updates from the two bridges. To
avoid this issue, and also greatly simplify the specification, the
bridge now has a fixed set of address ranges, specified at creation
time.
---
 src/dev/arm/RealView.py | 31 ++++++++++++++++++++++++-------
 1 file changed, 24 insertions(+), 7 deletions(-)

(limited to 'src/dev')

diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index 96f3c8a61..cd7744362 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2009 ARM Limited
+# Copyright (c) 2009-2011 ARM Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -177,12 +177,18 @@ class RealViewPBX(RealView):
     rtc_fake      = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
 
 
-    # Attach I/O devices that are on chip
-    def attachOnChipIO(self, bus):
+    # Attach I/O devices that are on chip and also set the appropriate
+    # ranges for the bridge
+    def attachOnChipIO(self, bus, bridge):
        self.gic.pio = bus.port
        self.l2x0_fake.pio = bus.port
        self.a9scu.pio = bus.port
        self.local_cpu_timer.pio = bus.port
+       # Bridge ranges based on excluding what is part of on-chip I/O
+       # (gic, l2x0, a9scu, local_cpu_timer)
+       bridge.ranges = [AddrRange(self.realview_io.pio_addr,
+                                  self.a9scu.pio_addr - 1),
+                        AddrRange(self.flash_fake.pio_addr, Addr.max)]
 
     # Attach I/O devices to specified bus object.  Can't do this
     # earlier, since the bus object itself is typically defined at the
@@ -248,10 +254,16 @@ class RealViewEB(RealView):
 
 
 
-    # Attach I/O devices that are on chip
-    def attachOnChipIO(self, bus):
+    # Attach I/O devices that are on chip and also set the appropriate
+    # ranges for the bridge
+    def attachOnChipIO(self, bus, bridge):
        self.gic.pio = bus.port
        self.l2x0_fake.pio = bus.port
+       # Bridge ranges based on excluding what is part of on-chip I/O
+       # (gic, l2x0)
+       bridge.ranges = [AddrRange(self.realview_io.pio_addr,
+                                  self.gic.cpu_addr - 1),
+                        AddrRange(self.flash_fake.pio_addr, Addr.max)]
 
     # Attach I/O devices to specified bus object.  Can't do this
     # earlier, since the bus object itself is typically defined at the
@@ -329,10 +341,15 @@ class VExpress_ELT(RealView):
     usb_fake       = IsaFake(pio_addr=0xFB000000, pio_size=0x1ffff)
 
 
-    # Attach I/O devices that are on chip
-    def attachOnChipIO(self, bus):
+    # Attach I/O devices that are on chip and also set the appropriate
+    # ranges for the bridge
+    def attachOnChipIO(self, bus, bridge):
        self.gic.pio = bus.port
        self.a9scu.pio = bus.port
+       # Bridge ranges based on excluding what is part of on-chip I/O
+       # (gic, a9scu)
+       bridge.ranges = [AddrRange(self.pci_cfg_base, self.a9scu.pio_addr - 1),
+                        AddrRange(self.local_cpu_timer.pio_addr, Addr.max)]
 
     # Attach I/O devices to specified bus object.  Can't do this
     # earlier, since the bus object itself is typically defined at the
-- 
cgit v1.2.3


From 55cf3f4ac11668c4da71411a4221cc8c84298b1a Mon Sep 17 00:00:00 2001
From: Andreas Hansson <andreas.hansson@arm.com>
Date: Tue, 17 Jan 2012 12:55:09 -0600
Subject: MEM: Removing the default port peer from Python ports

In preparation for the introduction of Master and Slave ports, this
patch removes the default port parameter in the Python port and thus
forces the argument list of the Port to contain only the
description. The drawback at this point is that the config port and
dma port of PCI and DMA devices have to be connected explicitly. This
is key for future diversification as the pio and config port are
slaves, but the dma port is a master.
---
 src/dev/Device.py          |  2 +-
 src/dev/Pci.py             |  2 +-
 src/dev/arm/RealView.py    | 11 +++++++++++
 src/dev/pcidev.cc          |  4 ++--
 src/dev/x86/SouthBridge.py |  2 ++
 5 files changed, 17 insertions(+), 4 deletions(-)

(limited to 'src/dev')

diff --git a/src/dev/Device.py b/src/dev/Device.py
index bf43449b5..aa622aa05 100644
--- a/src/dev/Device.py
+++ b/src/dev/Device.py
@@ -46,7 +46,7 @@ class BasicPioDevice(PioDevice):
 class DmaDevice(PioDevice):
     type = 'DmaDevice'
     abstract = True
-    dma = Port(Self.pio.peerObj.port, "DMA port")
+    dma = Port("DMA port")
     min_backoff_delay = Param.Latency('4ns',
       "min time between a nack packet being received and the next request made by the device")
     max_backoff_delay = Param.Latency('10us',
diff --git a/src/dev/Pci.py b/src/dev/Pci.py
index bd67d82fb..9c2f27142 100644
--- a/src/dev/Pci.py
+++ b/src/dev/Pci.py
@@ -41,7 +41,7 @@ class PciConfigAll(PioDevice):
 class PciDevice(DmaDevice):
     type = 'PciDevice'
     abstract = True
-    config = Port(Self.pio.peerObj.port, "PCI configuration space port")
+    config = Port("PCI configuration space port")
     pci_bus = Param.Int("PCI bus")
     pci_dev = Param.Int("PCI device number")
     pci_func = Param.Int("PCI function code")
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index cd7744362..1dec9a40d 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -199,9 +199,12 @@ class RealViewPBX(RealView):
        self.timer0.pio        = bus.port
        self.timer1.pio        = bus.port
        self.clcd.pio          = bus.port
+       self.clcd.dma          = bus.port
        self.kmi0.pio          = bus.port
        self.kmi1.pio          = bus.port
        self.cf_ctrl.pio       = bus.port
+       self.cf_ctrl.config    = bus.port
+       self.cf_ctrl.dma       = bus.port
        self.dmac_fake.pio     = bus.port
        self.uart1_fake.pio    = bus.port
        self.uart2_fake.pio    = bus.port
@@ -274,6 +277,7 @@ class RealViewEB(RealView):
        self.timer0.pio        = bus.port
        self.timer1.pio        = bus.port
        self.clcd.pio          = bus.port
+       self.clcd.dma          = bus.port
        self.kmi0.pio          = bus.port
        self.kmi1.pio          = bus.port
        self.dmac_fake.pio     = bus.port
@@ -364,13 +368,20 @@ class VExpress_ELT(RealView):
        self.elba_timer0.pio     = bus.port
        self.elba_timer1.pio     = bus.port
        self.clcd.pio            = bus.port
+       self.clcd.dma            = bus.port
        self.kmi0.pio            = bus.port
        self.kmi1.pio            = bus.port
        self.elba_kmi0.pio       = bus.port
        self.elba_kmi1.pio       = bus.port
        self.cf_ctrl.pio         = bus.port
+       self.cf_ctrl.config      = bus.port
+       self.cf_ctrl.dma         = bus.port
        self.ide.pio             = bus.port
+       self.ide.config          = bus.port
+       self.ide.dma             = bus.port
        self.ethernet.pio        = bus.port
+       self.ethernet.config     = bus.port
+       self.ethernet.dma        = bus.port
        self.pciconfig.pio       = bus.default
        bus.use_default_range    = True
 
diff --git a/src/dev/pcidev.cc b/src/dev/pcidev.cc
index c36ac11ba..534cbb173 100644
--- a/src/dev/pcidev.cc
+++ b/src/dev/pcidev.cc
@@ -150,8 +150,8 @@ PciDev::PciDev(const Params *p)
 void
 PciDev::init()
 {
-    if (!configPort)
-        panic("pci config port not connected to anything!");
+    if (!configPort && !configPort->isConnected())
+        panic("PCI config port on %s not connected to anything!\n", name());
    configPort->sendRangeChange();
    PioDevice::init();
 }
diff --git a/src/dev/x86/SouthBridge.py b/src/dev/x86/SouthBridge.py
index c23ecf01c..baff35e0b 100644
--- a/src/dev/x86/SouthBridge.py
+++ b/src/dev/x86/SouthBridge.py
@@ -105,6 +105,8 @@ class SouthBridge(SimObject):
         self.cmos.pio = bus.port
         self.dma1.pio = bus.port
         self.ide.pio = bus.port
+        self.ide.config = bus.port
+        self.ide.dma = bus.port
         self.keyboard.pio = bus.port
         self.pic1.pio = bus.port
         self.pic2.pio = bus.port
-- 
cgit v1.2.3


From 4acca8a0536d4445ed25b67edf571ae460446ab9 Mon Sep 17 00:00:00 2001
From: Andreas Hansson <andreas.hansson@arm.com>
Date: Fri, 27 Jan 2012 12:54:11 -0500
Subject: ns_gige: Fix a missing curly brace in if-statement

This patch adds a missing curly brace when clearing and setting the
appropriate bits in the ns_gige.cc code.

This commit is not based on any runtime bug experienced, but rather
inspection of the code.
---
 src/dev/ns_gige.cc | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

(limited to 'src/dev')

diff --git a/src/dev/ns_gige.cc b/src/dev/ns_gige.cc
index a7bc6d0ab..eb6eb6353 100644
--- a/src/dev/ns_gige.cc
+++ b/src/dev/ns_gige.cc
@@ -465,16 +465,16 @@ NSGigE::write(PacketPtr pkt)
                 reg & CFGR_DUPSTS ||
                 reg & CFGR_RESERVED ||
                 reg & CFGR_T64ADDR ||
-                reg & CFGR_PCI64_DET)
-
-            // First clear all writable bits
-            regs.config &= CFGR_LNKSTS | CFGR_SPDSTS | CFGR_DUPSTS |
-                                   CFGR_RESERVED | CFGR_T64ADDR |
-                                   CFGR_PCI64_DET;
-            // Now set the appropriate writable bits
-            regs.config |= reg & ~(CFGR_LNKSTS | CFGR_SPDSTS | CFGR_DUPSTS |
-                                   CFGR_RESERVED | CFGR_T64ADDR |
-                                   CFGR_PCI64_DET);
+                reg & CFGR_PCI64_DET) {
+                // First clear all writable bits
+                regs.config &= CFGR_LNKSTS | CFGR_SPDSTS | CFGR_DUPSTS |
+                    CFGR_RESERVED | CFGR_T64ADDR |
+                    CFGR_PCI64_DET;
+                // Now set the appropriate writable bits
+                regs.config |= reg & ~(CFGR_LNKSTS | CFGR_SPDSTS | CFGR_DUPSTS |
+                                       CFGR_RESERVED | CFGR_T64ADDR |
+                                       CFGR_PCI64_DET);
+            }
 
 // all these #if 0's are because i don't THINK the kernel needs to
 // have these implemented. if there is a problem relating to one of
-- 
cgit v1.2.3