From cf826ae296a4277bdf2ce46e4484295efde5a3c2 Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Tue, 23 May 2006 17:16:45 -0400 Subject: Minor fixes for full-system timing memory. Need to rewrite bus bridge to get any further. src/dev/io_device.cc: Set packet dest on timing responses. src/mem/bus.cc: Fix dest addr bounds check assertion. Add assertion to catch infinite loopbacks. src/mem/physical.cc: Add comment. --HG-- extra : convert_revision : 419b65a3a61e2d099884dbda117b338dffd80896 --- src/dev/io_device.cc | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/dev') diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc index 634b11b7e..5f7770a92 100644 --- a/src/dev/io_device.cc +++ b/src/dev/io_device.cc @@ -78,6 +78,8 @@ bool PioPort::recvTiming(Packet *pkt) { device->recvAtomic(pkt); + // turn packet around to go back to requester + pkt->dest = pkt->src; sendTiming(pkt, pkt->time - pkt->req->getTime()); return Success; } -- cgit v1.2.3