From 844fb845a51b15f13c7c744e0d5fdf5567c3da98 Mon Sep 17 00:00:00 2001 From: Tony Gutierrez Date: Wed, 26 Oct 2016 22:47:43 -0400 Subject: gpu-compute, hsail: make the PC a byte address, not an instruction index currently the PC is incremented on an instruction granularity, and not as an instruction's byte address. machine ISA instructions assume the PC is a byte address, and is incremented accordingly. here we make the GPU model, and the HSAIL instructions treat the PC as a byte address as well. --- src/gpu-compute/gpu_static_inst.hh | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'src/gpu-compute/gpu_static_inst.hh') diff --git a/src/gpu-compute/gpu_static_inst.hh b/src/gpu-compute/gpu_static_inst.hh index a73ec12e3..2fa1e0ca5 100644 --- a/src/gpu-compute/gpu_static_inst.hh +++ b/src/gpu-compute/gpu_static_inst.hh @@ -61,6 +61,9 @@ class GPUStaticInst : public GPUStaticInstFlags { public: GPUStaticInst(const std::string &opcode); + void instAddr(int inst_addr) { _instAddr = inst_addr; } + int instAddr() const { return _instAddr; } + int nextInstAddr() const { return _instAddr + instSize(); } void instNum(int num) { _instNum = num; } @@ -190,7 +193,7 @@ class GPUStaticInst : public GPUStaticInstFlags bool isGloballyCoherent() const { return _flags[GloballyCoherent]; } bool isSystemCoherent() const { return _flags[SystemCoherent]; } - virtual uint32_t instSize() = 0; + virtual int instSize() const = 0; // only used for memory instructions virtual void @@ -243,6 +246,7 @@ class GPUStaticInst : public GPUStaticInstFlags const std::string opcode; std::string disassembly; int _instNum; + int _instAddr; /** * Identifier of the immediate post-dominator instruction. */ @@ -286,7 +290,7 @@ class KernelLaunchStaticInst : public GPUStaticInst int numDstRegOperands() { return 0; } int numSrcRegOperands() { return 0; } bool isValid() const { return true; } - uint32_t instSize() { return 0; } + int instSize() const override { return 0; } }; #endif // __GPU_STATIC_INST_HH__ -- cgit v1.2.3