From 1595558f39f6724b3f5bd630c68bcb35fe8bf012 Mon Sep 17 00:00:00 2001 From: Iru Cai Date: Tue, 11 Feb 2020 16:43:31 +0800 Subject: learning-gem5: memory access example for simple object Change-Id: I63a68239ac73b2bce3dea5692deac29a3467d27b --- src/learning_gem5/part2/SimpleObject.py | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/learning_gem5/part2/SimpleObject.py') diff --git a/src/learning_gem5/part2/SimpleObject.py b/src/learning_gem5/part2/SimpleObject.py index ee7e9aef2..18ae60e3c 100644 --- a/src/learning_gem5/part2/SimpleObject.py +++ b/src/learning_gem5/part2/SimpleObject.py @@ -28,8 +28,13 @@ # Authors: Jason Lowe-Power from m5.params import * +# m5.proxy for Parent +from m5.proxy import * from m5.SimObject import SimObject class SimpleObject(SimObject): type = 'SimpleObject' cxx_header = "learning_gem5/part2/simple_object.hh" + mem_side = MasterPort("memory side port, send requests") + isread = Param.Bool(True, "is it going to read memory") + system = Param.System(Parent.any, "system object") -- cgit v1.2.3