From f85286b3debf4a4a94d3b959e5bb880be81bd692 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Tue, 17 Jan 2012 12:55:08 -0600 Subject: MEM: Add port proxies instead of non-structural ports Port proxies are used to replace non-structural ports, and thus enable all ports in the system to correspond to a structural entity. This has the advantage of accessing memory through the normal memory subsystem and thus allowing any constellation of distributed memories, address maps, etc. Most accesses are done through the "system port" that is used for loading binaries, debugging etc. For the entities that belong to the CPU, e.g. threads and thread contexts, they wrap the CPU data port in a port proxy. The following replacements are made: FunctionalPort > PortProxy TranslatingPort > SETranslatingPortProxy VirtualPort > FSTranslatingPortProxy --HG-- rename : src/mem/vport.cc => src/mem/fs_translating_port_proxy.cc rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh --- src/mem/SConscript | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mem/SConscript') diff --git a/src/mem/SConscript b/src/mem/SConscript index 50423fa67..dafc8c4a2 100644 --- a/src/mem/SConscript +++ b/src/mem/SConscript @@ -48,10 +48,10 @@ if env['TARGET_ISA'] != 'no': Source('physical.cc') if env['FULL_SYSTEM']: - Source('vport.cc') + Source('fs_translating_port_proxy.cc') elif env['TARGET_ISA'] != 'no': Source('page_table.cc') - Source('translating_port.cc') + Source('se_translating_port_proxy.cc') DebugFlag('Bus') DebugFlag('BusAddrRanges') -- cgit v1.2.3