From db8c55dede65e07cb9ea8e95c48badd2ea24462f Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Mon, 8 Jan 2018 04:41:25 -0800 Subject: x86, mem: Rewrite the multilevel page table class. The new version extracts all the x86 specific aspects of the class, and builds the interface around a variable collection of template arguments which are classes that represent the different levels of the page table. The multilevel page table class is now much more ISA independent. Change-Id: Id42e168a78d0e70f80ab2438480cb6e00a3aa636 Reviewed-on: https://gem5-review.googlesource.com/7347 Reviewed-by: Brandon Potter Maintainer: Gabe Black --- src/mem/SConscript | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/mem/SConscript') diff --git a/src/mem/SConscript b/src/mem/SConscript index 1d3249918..625eb0608 100644 --- a/src/mem/SConscript +++ b/src/mem/SConscript @@ -73,8 +73,6 @@ if env['TARGET_ISA'] != 'null': Source('fs_translating_port_proxy.cc') Source('se_translating_port_proxy.cc') Source('page_table.cc') -if env['TARGET_ISA'] == 'x86': - Source('multi_level_page_table.cc') if env['HAVE_DRAMSIM']: SimObject('DRAMSim2.py') -- cgit v1.2.3