From ea76f9757668018ad1f2ccb50fd61b9288057913 Mon Sep 17 00:00:00 2001
From: Ani Udipi <ani.udipi@arm.com>
Date: Fri, 1 Nov 2013 11:56:19 -0400
Subject: mem: Use the same timing calculation for DRAM read and write

This patch simplifies the DRAM model by re-using the function that
computes the busy and access time for both reads and writes.
---
 src/mem/SConscript | 1 -
 1 file changed, 1 deletion(-)

(limited to 'src/mem/SConscript')

diff --git a/src/mem/SConscript b/src/mem/SConscript
index 02d0aee73..90b49067e 100644
--- a/src/mem/SConscript
+++ b/src/mem/SConscript
@@ -76,7 +76,6 @@ CompoundFlag('Bus', ['BaseBus', 'BusAddrRanges', 'CoherentBus',
 DebugFlag('Bridge')
 DebugFlag('CommMonitor')
 DebugFlag('DRAM')
-DebugFlag('DRAMWR')
 DebugFlag('LLSC')
 DebugFlag('MMU')
 DebugFlag('MemoryAccess')
-- 
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