From 19a5b68db7d73542833d94ec8b23cad6daf0a787 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Wed, 4 Sep 2013 13:22:57 -0400 Subject: arch: Resurrect the NOISA build target and rename it NULL This patch makes it possible to once again build gem5 without any ISA. The main purpose is to enable work around the interconnect and memory system without having to build any CPU models or device models. The regress script is updated to include the NULL ISA target. Currently no regressions make use of it, but all the testers could (and perhaps should) transition to it. --HG-- rename : build_opts/NOISA => build_opts/NULL rename : src/arch/noisa/SConsopts => src/arch/null/SConsopts rename : src/arch/noisa/cpu_dummy.hh => src/arch/null/cpu_dummy.hh rename : src/cpu/intr_control.cc => src/cpu/intr_control_noisa.cc --- src/mem/cache/SConscript | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/mem/cache/SConscript') diff --git a/src/mem/cache/SConscript b/src/mem/cache/SConscript index 8323602d2..a4fbe04c0 100644 --- a/src/mem/cache/SConscript +++ b/src/mem/cache/SConscript @@ -30,9 +30,6 @@ Import('*') -if env['TARGET_ISA'] == 'no': - Return() - SimObject('BaseCache.py') Source('base.cc') -- cgit v1.2.3