From e57d8f2d897bc26aade774e090842367e38e974b Mon Sep 17 00:00:00 2001 From: Nikos Nikoleris Date: Mon, 10 Oct 2016 14:40:10 +0100 Subject: mem: Restructure whole-line writes to simplify write merging This patch changes how we deal with whole-line writes their responses. With these changes, we use the MSHR tracking to determine if a whole-line is written, and on a fill we simply handle the invalidation response, with the actual writes taking place as part of satisfying the CPU-side hit. Change-Id: I9a18e41a95db3c20b97f8bca7d95ff33d35a578b Reviewed-on: https://gem5-review.googlesource.com/c/12905 Reviewed-by: Andreas Sandberg Reviewed-by: Daniel Carvalho Maintainer: Nikos Nikoleris --- src/mem/cache/cache.hh | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/mem/cache/cache.hh') diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh index f8eccfee6..588e7b94e 100644 --- a/src/mem/cache/cache.hh +++ b/src/mem/cache/cache.hh @@ -152,7 +152,8 @@ class Cache : public BaseCache PacketPtr cleanEvictBlk(CacheBlk *blk); PacketPtr createMissPacket(PacketPtr cpu_pkt, CacheBlk *blk, - bool needsWritable) const override; + bool needs_writable, + bool is_whole_line_write) const override; /** * Send up a snoop request and find cached copies. If cached copies are -- cgit v1.2.3