From d6736384b2bb280ec12d472cac6eb25a70b4af60 Mon Sep 17 00:00:00 2001 From: Gene Wu Date: Mon, 23 Aug 2010 11:18:41 -0500 Subject: MEM: Make CLREX a first class request operation and clear locks in caches when it in received --- src/mem/cache/cache_impl.hh | 28 +++++++++++++++++----------- 1 file changed, 17 insertions(+), 11 deletions(-) (limited to 'src/mem/cache/cache_impl.hh') diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index e472b2601..d471b293a 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -273,12 +273,14 @@ bool Cache::access(PacketPtr pkt, BlkType *&blk, int &lat, PacketList &writebacks) { - int id = pkt->req->hasContextId() ? pkt->req->contextId() : -1; - blk = tags->accessBlock(pkt->getAddr(), lat, id); - - if (pkt->req->isUncacheable()) { - if (blk != NULL) { - tags->invalidateBlk(blk); + if (pkt->req->isUncacheable()) { + if (pkt->req->isClrex()) { + tags->clearLocks(); + } else { + blk = tags->findBlock(pkt->getAddr()); + if (blk != NULL) { + tags->invalidateBlk(blk); + } } blk = NULL; @@ -286,6 +288,8 @@ Cache::access(PacketPtr pkt, BlkType *&blk, return false; } + int id = pkt->req->hasContextId() ? pkt->req->contextId() : -1; + blk = tags->accessBlock(pkt->getAddr(), lat, id); DPRINTF(Cache, "%s%s %x %s\n", pkt->cmdString(), pkt->req->isInstFetch() ? " (ifetch)" : "", @@ -410,11 +414,13 @@ Cache::timingAccess(PacketPtr pkt) } if (pkt->req->isUncacheable()) { - int lat = hitLatency; - int id = pkt->req->hasContextId() ? pkt->req->contextId() : -1; - BlkType *blk = tags->accessBlock(pkt->getAddr(), lat, id); - if (blk != NULL) { - tags->invalidateBlk(blk); + if (pkt->req->isClrex()) { + tags->clearLocks(); + } else { + BlkType *blk = tags->findBlock(pkt->getAddr()); + if (blk != NULL) { + tags->invalidateBlk(blk); + } } // writes go in write buffer, reads use MSHR -- cgit v1.2.3