From d857faf073895dcfde97141bd6346fe5d4317f8e Mon Sep 17 00:00:00 2001
From: Lisa Hsu <hsul@eecs.umich.edu>
Date: Sun, 2 Nov 2008 21:57:07 -0500
Subject: Add in Context IDs to the simulator.  From now on, cpuId is almost
 never used, the primary identifier for a hardware context should be
 contextId().  The concept of threads within a CPU remains, in the form of
 threadId() because sometimes you need to know which context within a cpu to
 manipulate.

---
 src/mem/cache/prefetch/base.cc   |  4 ++--
 src/mem/cache/prefetch/ghb.cc    | 14 +++++++-------
 src/mem/cache/prefetch/ghb.hh    |  4 ++--
 src/mem/cache/prefetch/stride.cc | 10 +++++-----
 src/mem/cache/prefetch/stride.hh |  4 ++--
 5 files changed, 18 insertions(+), 18 deletions(-)

(limited to 'src/mem/cache/prefetch')

diff --git a/src/mem/cache/prefetch/base.cc b/src/mem/cache/prefetch/base.cc
index fcc02ff28..a7e6cfdfc 100644
--- a/src/mem/cache/prefetch/base.cc
+++ b/src/mem/cache/prefetch/base.cc
@@ -203,8 +203,8 @@ BasePrefetcher::handleMiss(PacketPtr &pkt, Tick time)
             PacketPtr prefetch;
             prefetch = new Packet(prefetchReq, MemCmd::HardPFReq, -1);
             prefetch->allocate();
-            prefetch->req->setThreadContext(pkt->req->getCpuNum(),
-                                            pkt->req->getThreadNum());
+            prefetch->req->setThreadContext(pkt->req->contextId(),
+                                            pkt->req->threadId());
 
             prefetch->time = time + (*delay); //@todo ADD LATENCY HERE
             //... initialize
diff --git a/src/mem/cache/prefetch/ghb.cc b/src/mem/cache/prefetch/ghb.cc
index f5b88e1a6..c8b87e99d 100644
--- a/src/mem/cache/prefetch/ghb.cc
+++ b/src/mem/cache/prefetch/ghb.cc
@@ -42,16 +42,16 @@ GHBPrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
                                  std::list<Tick> &delays)
 {
     Addr blkAddr = pkt->getAddr() & ~(Addr)(this->blkSize-1);
-    int cpuID = pkt->req->getCpuNum();
-    if (!useCPUId) cpuID = 0;
+    int contextId = pkt->req->contextId();
+    if (!useContextId) contextId = 0;
 
 
-    int new_stride = blkAddr - last_miss_addr[cpuID];
-    int old_stride = last_miss_addr[cpuID] -
-        second_last_miss_addr[cpuID];
+    int new_stride = blkAddr - last_miss_addr[contextId];
+    int old_stride = last_miss_addr[contextId] -
+        second_last_miss_addr[contextId];
 
-    second_last_miss_addr[cpuID] = last_miss_addr[cpuID];
-    last_miss_addr[cpuID] = blkAddr;
+    second_last_miss_addr[contextId] = last_miss_addr[contextId];
+    last_miss_addr[contextId] = blkAddr;
 
     if (new_stride == old_stride) {
         for (int d=1; d <= degree; d++) {
diff --git a/src/mem/cache/prefetch/ghb.hh b/src/mem/cache/prefetch/ghb.hh
index 4fb692016..156a74afa 100644
--- a/src/mem/cache/prefetch/ghb.hh
+++ b/src/mem/cache/prefetch/ghb.hh
@@ -47,13 +47,13 @@ class GHBPrefetcher : public BasePrefetcher
 
     Tick latency;
     int degree;
-    bool useCPUId;
+    bool useContextId;
 
   public:
 
     GHBPrefetcher(const BaseCacheParams *p)
         : BasePrefetcher(p), latency(p->prefetch_latency),
-          degree(p->prefetch_degree), useCPUId(p->prefetch_use_cpu_id)
+          degree(p->prefetch_degree), useContextId(p->prefetch_use_cpu_id)
     {
     }
 
diff --git a/src/mem/cache/prefetch/stride.cc b/src/mem/cache/prefetch/stride.cc
index e93058d6e..ad5846daa 100644
--- a/src/mem/cache/prefetch/stride.cc
+++ b/src/mem/cache/prefetch/stride.cc
@@ -41,18 +41,18 @@ StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
                                     std::list<Tick> &delays)
 {
 //      Addr blkAddr = pkt->paddr & ~(Addr)(this->blkSize-1);
-    int cpuID = pkt->req->getCpuNum();
-    if (!useCPUId) cpuID = 0;
+    int contextId = pkt->req->contextId();
+    if (!useContextId) contextId = 0;
 
     /* Scan Table for IAddr Match */
 /*      std::list<strideEntry*>::iterator iter;
-  for (iter=table[cpuID].begin();
-  iter !=table[cpuID].end();
+  for (iter=table[contextId].begin();
+  iter !=table[contextId].end();
   iter++) {
   if ((*iter)->IAddr == pkt->pc) break;
   }
 
-  if (iter != table[cpuID].end()) {
+  if (iter != table[contextId].end()) {
   //Hit in table
 
   int newStride = blkAddr - (*iter)->MAddr;
diff --git a/src/mem/cache/prefetch/stride.hh b/src/mem/cache/prefetch/stride.hh
index ca173277c..4738fd9bc 100644
--- a/src/mem/cache/prefetch/stride.hh
+++ b/src/mem/cache/prefetch/stride.hh
@@ -63,14 +63,14 @@ class StridePrefetcher : public BasePrefetcher
     std::list<strideEntry*> table[64/*MAX_CPUS*/];
     Tick latency;
     int degree;
-    bool useCPUId;
+    bool useContextId;
 
 
   public:
 
     StridePrefetcher(const BaseCacheParams *p)
         : BasePrefetcher(p), latency(p->prefetch_latency),
-          degree(p->prefetch_degree), useCPUId(p->prefetch_use_cpu_id)
+          degree(p->prefetch_degree), useContextId(p->prefetch_use_cpu_id)
     {
     }
 
-- 
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