From c6e0d8f54f1ce90933f95a7a3a875fed53b8ee3e Mon Sep 17 00:00:00 2001 From: "Daniel R. Carvalho" Date: Thu, 18 Oct 2018 15:31:51 +0200 Subject: mem-cache: Move access latency calculation to Cache Access latency was not being calculated properly, as it was always assuming that for hits reads take as long as writes, and that parallel accesses would produce the same latency for read and write misses. By moving the calculation to the Cache we can use the write/ read information, reduce latency variables duplication and remove Cache dependency from Tags. The tag lookup latency is still calculated by the Tags. Change-Id: I71bc68fb5c3515b372c3bf002d61b6f048a45540 Signed-off-by: Daniel R. Carvalho Reviewed-on: https://gem5-review.googlesource.com/c/13697 Reviewed-by: Nikos Nikoleris Maintainer: Nikos Nikoleris --- src/mem/cache/tags/fa_lru.cc | 18 +++++------------- 1 file changed, 5 insertions(+), 13 deletions(-) (limited to 'src/mem/cache/tags/fa_lru.cc') diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc index 2c92a940f..964846871 100644 --- a/src/mem/cache/tags/fa_lru.cc +++ b/src/mem/cache/tags/fa_lru.cc @@ -153,30 +153,22 @@ FALRU::accessBlock(Addr addr, bool is_secure, Cycles &lat, CachesMask mask = 0; FALRUBlk* blk = static_cast(findBlock(addr, is_secure)); + // If a cache hit if (blk && blk->isValid()) { - // If a cache hit - lat = accessLatency; - // Check if the block to be accessed is available. If not, - // apply the accessLatency on top of block->whenReady. - if (blk->whenReady > curTick() && - cache->ticksToCycles(blk->whenReady - curTick()) > - accessLatency) { - lat = cache->ticksToCycles(blk->whenReady - curTick()) + - accessLatency; - } mask = blk->inCachesMask; moveToHead(blk); - } else { - // If a cache miss - lat = lookupLatency; } + if (in_caches_mask) { *in_caches_mask = mask; } cacheTracking.recordAccess(blk); + // The tag lookup latency is the same for a hit or a miss + lat = lookupLatency; + return blk; } -- cgit v1.2.3