From cc95b5739097e31fdaa36a3ff443861969e338b1 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Thu, 5 Mar 2009 19:09:53 -0800 Subject: stats: Fix all stats usages to deal with template fixes --- src/mem/cache/base.hh | 32 ++++++++++++++++---------------- src/mem/cache/prefetch/base.hh | 18 +++++++++--------- src/mem/cache/tags/base.hh | 10 +++++----- src/mem/cache/tags/fa_lru.hh | 6 +++--- src/mem/cache/tags/iic.hh | 14 +++++++------- src/mem/cache/tags/iic_repl/gen.hh | 6 +++--- 6 files changed, 43 insertions(+), 43 deletions(-) (limited to 'src/mem/cache') diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh index fe191fb1c..4319717e5 100644 --- a/src/mem/cache/base.hh +++ b/src/mem/cache/base.hh @@ -223,14 +223,14 @@ class BaseCache : public MemObject */ /** Number of hits per thread for each type of command. @sa Packet::Command */ - Stats::Vector<> hits[MemCmd::NUM_MEM_CMDS]; + Stats::Vector hits[MemCmd::NUM_MEM_CMDS]; /** Number of hits for demand accesses. */ Stats::Formula demandHits; /** Number of hit for all accesses. */ Stats::Formula overallHits; /** Number of misses per thread for each type of command. @sa Packet::Command */ - Stats::Vector<> misses[MemCmd::NUM_MEM_CMDS]; + Stats::Vector misses[MemCmd::NUM_MEM_CMDS]; /** Number of misses for demand accesses. */ Stats::Formula demandMisses; /** Number of misses for all accesses. */ @@ -240,7 +240,7 @@ class BaseCache : public MemObject * Total number of cycles per thread/command spent waiting for a miss. * Used to calculate the average miss latency. */ - Stats::Vector<> missLatency[MemCmd::NUM_MEM_CMDS]; + Stats::Vector missLatency[MemCmd::NUM_MEM_CMDS]; /** Total number of cycles spent waiting for demand misses. */ Stats::Formula demandMissLatency; /** Total number of cycles spent waiting for all misses. */ @@ -268,50 +268,50 @@ class BaseCache : public MemObject Stats::Formula overallAvgMissLatency; /** The total number of cycles blocked for each blocked cause. */ - Stats::Vector<> blocked_cycles; + Stats::Vector blocked_cycles; /** The number of times this cache blocked for each blocked cause. */ - Stats::Vector<> blocked_causes; + Stats::Vector blocked_causes; /** The average number of cycles blocked for each blocked cause. */ Stats::Formula avg_blocked; /** The number of fast writes (WH64) performed. */ - Stats::Scalar<> fastWrites; + Stats::Scalar fastWrites; /** The number of cache copies performed. */ - Stats::Scalar<> cacheCopies; + Stats::Scalar cacheCopies; /** Number of blocks written back per thread. */ - Stats::Vector<> writebacks; + Stats::Vector writebacks; /** Number of misses that hit in the MSHRs per command and thread. */ - Stats::Vector<> mshr_hits[MemCmd::NUM_MEM_CMDS]; + Stats::Vector mshr_hits[MemCmd::NUM_MEM_CMDS]; /** Demand misses that hit in the MSHRs. */ Stats::Formula demandMshrHits; /** Total number of misses that hit in the MSHRs. */ Stats::Formula overallMshrHits; /** Number of misses that miss in the MSHRs, per command and thread. */ - Stats::Vector<> mshr_misses[MemCmd::NUM_MEM_CMDS]; + Stats::Vector mshr_misses[MemCmd::NUM_MEM_CMDS]; /** Demand misses that miss in the MSHRs. */ Stats::Formula demandMshrMisses; /** Total number of misses that miss in the MSHRs. */ Stats::Formula overallMshrMisses; /** Number of misses that miss in the MSHRs, per command and thread. */ - Stats::Vector<> mshr_uncacheable[MemCmd::NUM_MEM_CMDS]; + Stats::Vector mshr_uncacheable[MemCmd::NUM_MEM_CMDS]; /** Total number of misses that miss in the MSHRs. */ Stats::Formula overallMshrUncacheable; /** Total cycle latency of each MSHR miss, per command and thread. */ - Stats::Vector<> mshr_miss_latency[MemCmd::NUM_MEM_CMDS]; + Stats::Vector mshr_miss_latency[MemCmd::NUM_MEM_CMDS]; /** Total cycle latency of demand MSHR misses. */ Stats::Formula demandMshrMissLatency; /** Total cycle latency of overall MSHR misses. */ Stats::Formula overallMshrMissLatency; /** Total cycle latency of each MSHR miss, per command and thread. */ - Stats::Vector<> mshr_uncacheable_lat[MemCmd::NUM_MEM_CMDS]; + Stats::Vector mshr_uncacheable_lat[MemCmd::NUM_MEM_CMDS]; /** Total cycle latency of overall MSHR misses. */ Stats::Formula overallMshrUncacheableLatency; @@ -342,11 +342,11 @@ class BaseCache : public MemObject Stats::Formula overallAvgMshrUncacheableLatency; /** The number of times a thread hit its MSHR cap. */ - Stats::Vector<> mshr_cap_events; + Stats::Vector mshr_cap_events; /** The number of times software prefetches caused the MSHR to block. */ - Stats::Vector<> soft_prefetch_mshr_full; + Stats::Vector soft_prefetch_mshr_full; - Stats::Scalar<> mshr_no_allocate_misses; + Stats::Scalar mshr_no_allocate_misses; /** * @} diff --git a/src/mem/cache/prefetch/base.hh b/src/mem/cache/prefetch/base.hh index 92040e899..fc027cb3b 100644 --- a/src/mem/cache/prefetch/base.hh +++ b/src/mem/cache/prefetch/base.hh @@ -79,15 +79,15 @@ class BasePrefetcher public: - Stats::Scalar<> pfIdentified; - Stats::Scalar<> pfMSHRHit; - Stats::Scalar<> pfCacheHit; - Stats::Scalar<> pfBufferHit; - Stats::Scalar<> pfRemovedFull; - Stats::Scalar<> pfRemovedMSHR; - Stats::Scalar<> pfIssued; - Stats::Scalar<> pfSpanPage; - Stats::Scalar<> pfSquashed; + Stats::Scalar pfIdentified; + Stats::Scalar pfMSHRHit; + Stats::Scalar pfCacheHit; + Stats::Scalar pfBufferHit; + Stats::Scalar pfRemovedFull; + Stats::Scalar pfRemovedMSHR; + Stats::Scalar pfIssued; + Stats::Scalar pfSpanPage; + Stats::Scalar pfSquashed; void regStats(const std::string &name); diff --git a/src/mem/cache/tags/base.hh b/src/mem/cache/tags/base.hh index b7b0c7ef0..46c7186b1 100644 --- a/src/mem/cache/tags/base.hh +++ b/src/mem/cache/tags/base.hh @@ -70,19 +70,19 @@ class BaseTags */ /** Number of replacements of valid blocks per thread. */ - Stats::Vector<> replacements; + Stats::Vector replacements; /** Per cycle average of the number of tags that hold valid data. */ - Stats::Average<> tagsInUse; + Stats::Average tagsInUse; /** The total number of references to a block before it is replaced. */ - Stats::Scalar<> totalRefs; + Stats::Scalar totalRefs; /** * The number of reference counts sampled. This is different from * replacements because we sample all the valid blocks when the simulator * exits. */ - Stats::Scalar<> sampledRefs; + Stats::Scalar sampledRefs; /** * Average number of references to a block before is was replaced. @@ -91,7 +91,7 @@ class BaseTags Stats::Formula avgRefs; /** The cycle that the warmup percentage was hit. */ - Stats::Scalar<> warmupCycle; + Stats::Scalar warmupCycle; /** * @} */ diff --git a/src/mem/cache/tags/fa_lru.hh b/src/mem/cache/tags/fa_lru.hh index 7925e1870..4eab10c49 100644 --- a/src/mem/cache/tags/fa_lru.hh +++ b/src/mem/cache/tags/fa_lru.hh @@ -139,11 +139,11 @@ class FALRU : public BaseTags */ /** Hits in each cache size >= 128K. */ - Stats::Vector<> hits; + Stats::Vector hits; /** Misses in each cache size >= 128K. */ - Stats::Vector<> misses; + Stats::Vector misses; /** Total number of accesses. */ - Stats::Scalar<> accesses; + Stats::Scalar accesses; /** * @} diff --git a/src/mem/cache/tags/iic.hh b/src/mem/cache/tags/iic.hh index 9e14dc119..45c8ee801 100644 --- a/src/mem/cache/tags/iic.hh +++ b/src/mem/cache/tags/iic.hh @@ -248,20 +248,20 @@ class IIC : public BaseTags */ /** Hash hit depth of cache hits. */ - Stats::Distribution<> hitHashDepth; + Stats::Distribution hitHashDepth; /** Hash depth for cache misses. */ - Stats::Distribution<> missHashDepth; + Stats::Distribution missHashDepth; /** Count of accesses to each hash set. */ - Stats::Distribution<> setAccess; + Stats::Distribution setAccess; /** The total hash depth for every miss. */ - Stats::Scalar<> missDepthTotal; + Stats::Scalar missDepthTotal; /** The total hash depth for all hits. */ - Stats::Scalar<> hitDepthTotal; + Stats::Scalar hitDepthTotal; /** The number of hash misses. */ - Stats::Scalar<> hashMiss; + Stats::Scalar hashMiss; /** The number of hash hits. */ - Stats::Scalar<> hashHit; + Stats::Scalar hashHit; /** @} */ public: diff --git a/src/mem/cache/tags/iic_repl/gen.hh b/src/mem/cache/tags/iic_repl/gen.hh index 22436b384..fe105d95a 100644 --- a/src/mem/cache/tags/iic_repl/gen.hh +++ b/src/mem/cache/tags/iic_repl/gen.hh @@ -162,11 +162,11 @@ class GenRepl : public Repl * @{ */ /** The number of replacements from each pool. */ - Stats::Distribution<> repl_pool; + Stats::Distribution repl_pool; /** The number of advances out of each pool. */ - Stats::Distribution<> advance_pool; + Stats::Distribution advance_pool; /** The number of demotions from each pool. */ - Stats::Distribution<> demote_pool; + Stats::Distribution demote_pool; /** * @} */ -- cgit v1.2.3