From f67963078883cdb62094ca187a40a79d773251a7 Mon Sep 17 00:00:00 2001
From: Steve Reinhardt <steve.reinhardt@amd.com>
Date: Sat, 26 Sep 2009 10:50:50 -0700
Subject: Minor cleanup: Use the blockAlign() method where it applies in the
 cache.

---
 src/mem/cache/base.hh       | 2 +-
 src/mem/cache/cache_impl.hh | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

(limited to 'src/mem/cache')

diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index 24f993383..c245fecd2 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -379,7 +379,7 @@ class BaseCache : public MemObject
     }
 
 
-    Addr blockAlign(Addr addr) const { return (addr & ~(blkSize - 1)); }
+    Addr blockAlign(Addr addr) const { return (addr & ~(Addr(blkSize - 1))); }
 
 
     const Range<Addr> &getAddrRange() const { return addrRange; }
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index d8630c1f5..429928c79 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -449,7 +449,7 @@ Cache<TagStore>::timingAccess(PacketPtr pkt)
     } else {
         // miss
 
-        Addr blk_addr = pkt->getAddr() & ~(Addr(blkSize-1));
+        Addr blk_addr = blockAlign(pkt->getAddr());
         MSHR *mshr = mshrQueue.findMatch(blk_addr);
 
         if (mshr) {
@@ -692,7 +692,7 @@ Cache<TagStore>::functionalAccess(PacketPtr pkt,
                                   CachePort *incomingPort,
                                   CachePort *otherSidePort)
 {
-    Addr blk_addr = pkt->getAddr() & ~(blkSize - 1);
+    Addr blk_addr = blockAlign(pkt->getAddr());
     BlkType *blk = tags->findBlock(pkt->getAddr());
 
     pkt->pushLabel(name());
@@ -1162,7 +1162,7 @@ Cache<TagStore>::snoopTiming(PacketPtr pkt)
 
     BlkType *blk = tags->findBlock(pkt->getAddr());
 
-    Addr blk_addr = pkt->getAddr() & ~(Addr(blkSize-1));
+    Addr blk_addr = blockAlign(pkt->getAddr());
     MSHR *mshr = mshrQueue.findMatch(blk_addr);
 
     // Let the MSHR itself track the snoop and decide whether we want
-- 
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