From 39220ef3681deb8c224cdcf28efdaa74bfa2facd Mon Sep 17 00:00:00 2001 From: Nikos Nikoleris Date: Thu, 12 Sep 2019 16:10:26 +0100 Subject: mem: Fix DRAM controller to operate on its own address space Typically, a memory controller is assigned an address range of the form [start, end). This address range might be interleaved and therefore only a non-continuous subset of the addresses in the address range is handed by this controller. Prior to this patch, the DRAM controller was unaware of the interleaving and as a result the address range could affect the mapping of addresses to DRAM ranks, rows and columns. This patch changes the DRAM controller, to transform the input address to a continuous range of the form [0, size). As a result the DRAM controller always operates on a dense and continuous address range regardlesss of the system configuration. Change-Id: I7d273a630928421d1854658c9bb0ab34e9360851 Signed-off-by: Nikos Nikoleris Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19328 Reviewed-by: Daniel Carvalho Reviewed-by: Wendy Elsasser Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- src/mem/dram_ctrl.hh | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'src/mem/dram_ctrl.hh') diff --git a/src/mem/dram_ctrl.hh b/src/mem/dram_ctrl.hh index 8c8c24552..ad2f051fb 100644 --- a/src/mem/dram_ctrl.hh +++ b/src/mem/dram_ctrl.hh @@ -818,6 +818,20 @@ class DRAMCtrl : public QoS::MemCtrl DRAMPacket* decodeAddr(const PacketPtr pkt, Addr dramPktAddr, unsigned int size, bool isRead) const; + /** + * Get an address in a dense range which starts from 0. The input + * address is the physical address of the request in an address + * space that contains other SimObjects apart from this + * controller. + * + * @param addr The intput address which should be in the addrRange + * @return An address in the continues range [0, max) + */ + Addr getCtrlAddr(Addr addr) + { + return range.getOffset(addr); + } + /** * The memory schduler/arbiter - picks which request needs to * go next, based on the specified policy such as FCFS or FR-FCFS @@ -946,7 +960,6 @@ class DRAMCtrl : public QoS::MemCtrl const uint32_t bankGroupsPerRank; const bool bankGroupArch; const uint32_t banksPerRank; - const uint32_t channels; uint32_t rowsPerBank; const uint32_t readBufferSize; const uint32_t writeBufferSize; -- cgit v1.2.3