From 8421362cc23a6341e44ce59f2c4f578438fd8a55 Mon Sep 17 00:00:00 2001
From: Sean Wilson <spwilson2@wisc.edu>
Date: Wed, 7 Jun 2017 15:02:52 -0500
Subject: mem: Replace EventWrapper use with EventFunctionWrapper

NOTE: With this change there is a possibility for `DRAMCtrl::Rank`s
event names to not properly match the rank they were generated by. This
could occur if the public rank member is modified after the Rank's
construction. A patch would mean refactoring Rank and `DRAMCtrl`b to
privatize many of the members of Rank behind getters.

Change-Id: I7b8bd15086f4ffdfd3f40be4aeddac5e786fd78e
Signed-off-by: Sean Wilson <spwilson2@wisc.edu>
Reviewed-on: https://gem5-review.googlesource.com/3745
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
---
 src/mem/dramsim2.hh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/mem/dramsim2.hh')

diff --git a/src/mem/dramsim2.hh b/src/mem/dramsim2.hh
index 5cde19cd8..6444f75d6 100644
--- a/src/mem/dramsim2.hh
+++ b/src/mem/dramsim2.hh
@@ -148,7 +148,7 @@ class DRAMSim2 : public AbstractMemory
     /**
      * Event to schedule sending of responses
      */
-    EventWrapper<DRAMSim2, &DRAMSim2::sendResponse> sendResponseEvent;
+    EventFunctionWrapper sendResponseEvent;
 
     /**
      * Progress the controller one clock cycle.
@@ -158,7 +158,7 @@ class DRAMSim2 : public AbstractMemory
     /**
      * Event to schedule clock ticks
      */
-    EventWrapper<DRAMSim2, &DRAMSim2::tick> tickEvent;
+    EventFunctionWrapper tickEvent;
 
     /**
      * Upstream caches need this packet until true is returned, so
-- 
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