From 9481d05b8aea0faf336f604f3e18b451d5197c12 Mon Sep 17 00:00:00 2001
From: Nilay Vaish <nilay@cs.wisc.edu>
Date: Mon, 23 Jan 2012 11:07:11 -0600
Subject: MemCmd: Add a command for invalidation requests to LSQ This command
 will be sent from the memory system (Ruby) to the LSQ of an O3 CPU so that
 the LSQ, if it needs to, invalidates the address in the request packet.

---
 src/mem/packet.cc | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'src/mem/packet.cc')

diff --git a/src/mem/packet.cc b/src/mem/packet.cc
index 64f4fcd14..4c3a785dc 100644
--- a/src/mem/packet.cc
+++ b/src/mem/packet.cc
@@ -168,6 +168,9 @@ MemCmd::commandInfo[] =
     { SET2(IsRequest, IsPrint), InvalidCmd, "PrintReq" },
     /* Flush Request */
     { SET3(IsRequest, IsFlush, NeedsExclusive), InvalidCmd, "FlushReq" },
+    /* Invalidation Request */
+    { SET3(NeedsExclusive, IsInvalidate, IsRequest),
+      InvalidCmd, "InvalidationReq" },
 };
 
 bool
-- 
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