From 54d76f0ce5d721ad3b4de168db98054844e634cc Mon Sep 17 00:00:00 2001
From: Brad Beckmann <Brad.Beckmann@amd.com>
Date: Fri, 20 Aug 2010 11:46:12 -0700
Subject: ruby: Fixed L2 cache miss profiling

Fixed L2 cache miss profiling for the MOESI_CMP_token protocol
---
 src/mem/protocol/MOESI_CMP_token-msg.sm | 11 -----------
 1 file changed, 11 deletions(-)

(limited to 'src/mem/protocol/MOESI_CMP_token-msg.sm')

diff --git a/src/mem/protocol/MOESI_CMP_token-msg.sm b/src/mem/protocol/MOESI_CMP_token-msg.sm
index 40c16b5e1..5bc0b81ab 100644
--- a/src/mem/protocol/MOESI_CMP_token-msg.sm
+++ b/src/mem/protocol/MOESI_CMP_token-msg.sm
@@ -144,14 +144,3 @@ structure(DMAResponseMsg, desc="...", interface="NetworkMessage") {
   DataBlock DataBlk,         desc="DataBlk attached to this request";
   MessageSizeType MessageSize, desc="size category of the message";
 }
-
-//GenericRequestType convertToGenericType(CoherenceRequestType type) {
-//  if(type == CoherenceRequestType:GETS) {
-//    return GenericRequestType:GETS;
-//  } else if(type == CoherenceRequestType:GETX) {
-//    return GenericRequestType:GETX;
-//  } else {
-//    DEBUG_EXPR(type);
-//    error("invalid CoherenceRequestType");
-//  }
-//}
-- 
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