From 48e43c9ad1cd292b494f3d05f9d13845dd1a6d1e Mon Sep 17 00:00:00 2001
From: Michael LeBeane <michael.lebeane@amd.com>
Date: Wed, 26 Oct 2016 22:48:37 -0400
Subject: ruby: Allow multiple outstanding DMA requests DMA sequencers and
 protocols can currently only issue one DMA access at a time. This patch
 implements the necessary functionality to support multiple outstanding DMA
 requests in Ruby.

---
 src/mem/protocol/RubySlicc_Types.sm | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/mem/protocol/RubySlicc_Types.sm')

diff --git a/src/mem/protocol/RubySlicc_Types.sm b/src/mem/protocol/RubySlicc_Types.sm
index e8a739eb4..27a045d29 100644
--- a/src/mem/protocol/RubySlicc_Types.sm
+++ b/src/mem/protocol/RubySlicc_Types.sm
@@ -220,8 +220,8 @@ structure (WireBuffer, inport="yes", outport="yes", external = "yes") {
 }
 
 structure (DMASequencer, external = "yes") {
-  void ackCallback();
-  void dataCallback(DataBlock);
+  void ackCallback(Addr);
+  void dataCallback(DataBlock,Addr);
   void recordRequestType(CacheRequestType);
 }
 
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