From 54d76f0ce5d721ad3b4de168db98054844e634cc Mon Sep 17 00:00:00 2001 From: Brad Beckmann Date: Fri, 20 Aug 2010 11:46:12 -0700 Subject: ruby: Fixed L2 cache miss profiling Fixed L2 cache miss profiling for the MOESI_CMP_token protocol --- src/mem/protocol/MOESI_CMP_token-L1cache.sm | 6 ++++- src/mem/protocol/MOESI_CMP_token-L2cache.sm | 38 +++++++++++++++++++---------- src/mem/protocol/MOESI_CMP_token-msg.sm | 11 --------- src/mem/protocol/RubySlicc_Profiler.sm | 1 - src/mem/protocol/RubySlicc_Types.sm | 5 ++++ 5 files changed, 35 insertions(+), 26 deletions(-) (limited to 'src/mem/protocol') diff --git a/src/mem/protocol/MOESI_CMP_token-L1cache.sm b/src/mem/protocol/MOESI_CMP_token-L1cache.sm index 381debce5..4af3338d8 100644 --- a/src/mem/protocol/MOESI_CMP_token-L1cache.sm +++ b/src/mem/protocol/MOESI_CMP_token-L1cache.sm @@ -1357,7 +1357,11 @@ machine(L1Cache, "Token protocol") action(uu_profileMiss, "\u", desc="Profile the demand miss") { peek(mandatoryQueue_in, CacheMsg) { - // profile_miss(in_msg, id); + if (L1DcacheMemory.isTagPresent(address)) { + L1DcacheMemory.profileMiss(in_msg); + } else { + L1IcacheMemory.profileMiss(in_msg); + } } } diff --git a/src/mem/protocol/MOESI_CMP_token-L2cache.sm b/src/mem/protocol/MOESI_CMP_token-L2cache.sm index 706b286fa..fcc91f223 100644 --- a/src/mem/protocol/MOESI_CMP_token-L2cache.sm +++ b/src/mem/protocol/MOESI_CMP_token-L2cache.sm @@ -304,6 +304,17 @@ machine(L2Cache, "Token protocol") } } + GenericRequestType convertToGenericType(CoherenceRequestType type) { + if(type == CoherenceRequestType:GETS) { + return GenericRequestType:GETS; + } else if(type == CoherenceRequestType:GETX) { + return GenericRequestType:GETX; + } else { + DEBUG_EXPR(type); + error("invalid CoherenceRequestType"); + } + } + // ** OUT_PORTS ** out_port(globalRequestNetwork_out, RequestMsg, GlobalRequestFromL2Cache); out_port(localRequestNetwork_out, RequestMsg, L1RequestFromL2Cache); @@ -918,12 +929,13 @@ machine(L2Cache, "Token protocol") L2cacheMemory.deallocate(address); } - //action(uu_profileMiss, "\u", desc="Profile the demand miss") { - // peek(L1requestNetwork_in, RequestMsg) { - // AccessModeType not implemented - //profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, machineIDToNodeID(in_msg.Requestor)); - // } - //} + action(uu_profileMiss, "\u", desc="Profile the demand miss") { + peek(L1requestNetwork_in, RequestMsg) { + L2cacheMemory.profileGenericRequest(convertToGenericType(in_msg.Type), + in_msg.AccessMode, + in_msg.Prefetch); + } + } action(w_assertIncomingDataAndCacheDataMatch, "w", desc="Assert that the incoming data and the data in the cache match") { @@ -961,7 +973,7 @@ machine(L2Cache, "Token protocol") transition(NP, {L1_GETS, L1_GETX}) { a_broadcastLocalRequest; r_markNewSharer; - //uu_profileMiss; + uu_profileMiss; o_popL1RequestQueue; } @@ -1012,7 +1024,7 @@ machine(L2Cache, "Token protocol") a_broadcastLocalRequest; tt_sendLocalAckWithCollectedTokens; // send any tokens we have collected r_markNewSharer; - //uu_profileMiss; + uu_profileMiss; o_popL1RequestQueue; } @@ -1020,7 +1032,7 @@ machine(L2Cache, "Token protocol") a_broadcastLocalRequest; tt_sendLocalAckWithCollectedTokens; // send any tokens we have collected r_markNewSharer; - //uu_profileMiss; + uu_profileMiss; o_popL1RequestQueue; } @@ -1181,7 +1193,7 @@ machine(L2Cache, "Token protocol") tt_sendLocalAckWithCollectedTokens; r_markNewSharer; r_setMRU; - //uu_profileMiss; + uu_profileMiss; o_popL1RequestQueue; } @@ -1294,7 +1306,7 @@ machine(L2Cache, "Token protocol") k_dataAndAllTokensFromL2CacheToL1Requestor; r_markNewSharer; r_setMRU; - //uu_profileMiss; + uu_profileMiss; o_popL1RequestQueue; } @@ -1382,7 +1394,7 @@ machine(L2Cache, "Token protocol") transition(I_L, {L1_GETX, L1_GETS}) { a_broadcastLocalRequest; r_markNewSharer; - //uu_profileMiss; + uu_profileMiss; o_popL1RequestQueue; } @@ -1391,7 +1403,7 @@ machine(L2Cache, "Token protocol") tt_sendLocalAckWithCollectedTokens; r_markNewSharer; r_setMRU; - //uu_profileMiss; + uu_profileMiss; o_popL1RequestQueue; } diff --git a/src/mem/protocol/MOESI_CMP_token-msg.sm b/src/mem/protocol/MOESI_CMP_token-msg.sm index 40c16b5e1..5bc0b81ab 100644 --- a/src/mem/protocol/MOESI_CMP_token-msg.sm +++ b/src/mem/protocol/MOESI_CMP_token-msg.sm @@ -144,14 +144,3 @@ structure(DMAResponseMsg, desc="...", interface="NetworkMessage") { DataBlock DataBlk, desc="DataBlk attached to this request"; MessageSizeType MessageSize, desc="size category of the message"; } - -//GenericRequestType convertToGenericType(CoherenceRequestType type) { -// if(type == CoherenceRequestType:GETS) { -// return GenericRequestType:GETS; -// } else if(type == CoherenceRequestType:GETX) { -// return GenericRequestType:GETX; -// } else { -// DEBUG_EXPR(type); -// error("invalid CoherenceRequestType"); -// } -//} diff --git a/src/mem/protocol/RubySlicc_Profiler.sm b/src/mem/protocol/RubySlicc_Profiler.sm index ce1183e22..ed6b10d8e 100644 --- a/src/mem/protocol/RubySlicc_Profiler.sm +++ b/src/mem/protocol/RubySlicc_Profiler.sm @@ -40,7 +40,6 @@ void profile_miss(CacheMsg msg); void profile_L1Cache_miss(CacheMsg msg, NodeID l1cacheID); // used by CMP protocols -void profile_L2Cache_miss(GenericRequestType requestType, AccessModeType type, int msgSize, PrefetchBit pfBit, NodeID l2cacheID); void profile_request(std::string L1CacheStateStr, std::string L2CacheStateStr, std::string directoryStateStr, std::string requestTypeStr); void profileMessageReordering(bool wasReordered); diff --git a/src/mem/protocol/RubySlicc_Types.sm b/src/mem/protocol/RubySlicc_Types.sm index 7fc817600..8dcdabeb8 100644 --- a/src/mem/protocol/RubySlicc_Types.sm +++ b/src/mem/protocol/RubySlicc_Types.sm @@ -126,6 +126,11 @@ external_type(CacheMemory) { void changePermission(Address, AccessPermission); bool isTagPresent(Address); void profileMiss(CacheMsg); + + void profileGenericRequest(GenericRequestType, + AccessModeType, + PrefetchBit); + void setMRU(Address); } -- cgit v1.2.3