From 2f30950143cc70bc42a3c8a4111d7cf8198ec881 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 11 May 2009 10:38:43 -0700 Subject: ruby: Import ruby and slicc from GEMS We eventually plan to replace the m5 cache hierarchy with the GEMS hierarchy, but for now we will make both live alongside eachother. --- src/mem/ruby/common/Debug.def | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 src/mem/ruby/common/Debug.def (limited to 'src/mem/ruby/common/Debug.def') diff --git a/src/mem/ruby/common/Debug.def b/src/mem/ruby/common/Debug.def new file mode 100644 index 000000000..23af06655 --- /dev/null +++ b/src/mem/ruby/common/Debug.def @@ -0,0 +1,17 @@ +DEFINE_COMP(SYSTEM_COMP, 's', "System") +DEFINE_COMP(NODE_COMP, 'N', "Node") +DEFINE_COMP(QUEUE_COMP, 'q', "Queue") +DEFINE_COMP(EVENTQUEUE_COMP, 'e', "Event Queue") +DEFINE_COMP(NETWORK_COMP, 'n', "Network") +DEFINE_COMP(SEQUENCER_COMP, 'S', "Sequencer") +DEFINE_COMP(TESTER_COMP, 't', "Tester") +DEFINE_COMP(GENERATED_COMP, 'g', "Generated") +DEFINE_COMP(SLICC_COMP, 'l', "SLICC") +DEFINE_COMP(NETWORKQUEUE_COMP, 'Q', "Network Queues") +DEFINE_COMP(TIME_COMP, 'T', "Time") +DEFINE_COMP(NETWORK_INTERNALS_COMP, 'i', "Network Internals") +DEFINE_COMP(STOREBUFFER_COMP, 'b', "Store Buffer") +DEFINE_COMP(CACHE_COMP, 'c', "Cache") +DEFINE_COMP(PREDICTOR_COMP, 'p', "Predictor") +DEFINE_COMP(ALLOCATOR_COMP, 'a', "Allocator") + -- cgit v1.2.3