From 93f2f69657d0a2420a2c86b71505e6d27e6e2a38 Mon Sep 17 00:00:00 2001 From: Daniel Sanchez Date: Mon, 11 May 2009 10:38:46 -0700 Subject: ruby: Working M5 interface and updated Ruby interface. This changeset also includes a lot of work from Derek Hower RubyMemory is now both a driver for Ruby and a port for M5. Changed makeRequest/hitCallback interface. Brought packets (superficially) into the sequencer. Modified tester infrastructure to be packet based. and Ruby can be used together through the example ruby_se.py script. SPARC parallel applications work, and the timing *seems* right from combined M5/Ruby debug traces. To run, % build/ALPHA_SE/m5.debug configs/example/ruby_se.py -c tests/test-progs/hello/bin/alpha/linux/hello -n 4 -t --- src/mem/ruby/recorder/TraceRecord.cc | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) (limited to 'src/mem/ruby/recorder') diff --git a/src/mem/ruby/recorder/TraceRecord.cc b/src/mem/ruby/recorder/TraceRecord.cc index ab1069582..31b83690e 100644 --- a/src/mem/ruby/recorder/TraceRecord.cc +++ b/src/mem/ruby/recorder/TraceRecord.cc @@ -37,6 +37,7 @@ #include "mem/ruby/system/System.hh" #include "mem/ruby/slicc_interface/AbstractChip.hh" #include "mem/protocol/CacheMsg.hh" +#include "mem/packet.hh" TraceRecord::TraceRecord(NodeID id, const Address& data_addr, const Address& pc_addr, CacheRequestType type, Time time) { @@ -78,14 +79,27 @@ void TraceRecord::issueRequest() const Sequencer* sequencer_ptr = chip_ptr->getSequencer((m_node_num/RubyConfig::numberofSMTThreads())%RubyConfig::numberOfProcsPerChip()); assert(sequencer_ptr != NULL); - CacheMsg request(m_data_address, m_data_address, m_type, m_pc_address, AccessModeType_UserMode, 0, PrefetchBit_Yes, 0, Address(0), 0 /* only 1 SMT thread */); + Addr data_addr = m_data_address.getAddress(); + Addr pc_addr = m_pc_address.getAddress(); + Request request(0, data_addr, 0, Flags(Request::PREFETCH), pc_addr, m_node_num, 0); + MemCmd::Command command; + if (m_type == CacheRequestType_LD || m_type == CacheRequestType_IFETCH) + command = MemCmd::ReadReq; + else if (m_type == CacheRequestType_ST) + command = MemCmd::WriteReq; + else if (m_type == CacheRequestType_ATOMIC) + command = MemCmd::SwapReq; // TODO -- differentiate between atomic types + else + assert(false); + + Packet pkt(&request, command, 0); // TODO -- make dest a real NodeID // Clear out the sequencer while (!sequencer_ptr->empty()) { g_eventQueue_ptr->triggerEvents(g_eventQueue_ptr->getTime() + 100); } - sequencer_ptr->makeRequest(request); + sequencer_ptr->makeRequest(&pkt); // Clear out the sequencer while (!sequencer_ptr->empty()) { -- cgit v1.2.3