From 2d3cae02f5d4a6c1f116f922d0ee3dde9e9dcc77 Mon Sep 17 00:00:00 2001
From: Nilay Vaish <nilay@cs.wisc.edu>
Date: Wed, 11 Jan 2012 13:39:58 -0600
Subject: Ruby Port: Add a list of cpu ports attached to this port

---
 src/mem/ruby/system/RubyPort.hh | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/mem/ruby/system/RubyPort.hh')

diff --git a/src/mem/ruby/system/RubyPort.hh b/src/mem/ruby/system/RubyPort.hh
index 88e865766..0160d8fc8 100644
--- a/src/mem/ruby/system/RubyPort.hh
+++ b/src/mem/ruby/system/RubyPort.hh
@@ -148,6 +148,10 @@ class RubyPort : public MemObject
 
     M5Port* physMemPort;
 
+    /*! Vector of CPU Port attached to this Ruby port. */
+    typedef std::vector<M5Port*>::iterator CpuPortIter;
+    std::vector<M5Port*> cpu_ports;
+
     PhysicalMemory* physmem;
     RubySystem* ruby_system;
 
-- 
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