From a128ba7cd1ab506e3468c82c1060a7fb4ad909b1 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Fri, 30 Mar 2012 09:42:36 -0400 Subject: Ruby: Remove the physMemPort and instead access memory directly This patch removes the physMemPort from the RubySequencer and instead uses the system pointer to access the physmem. The system already keeps track of the physmem and the valid memory address ranges, and with this patch we merely make use of that existing functionality. The memory is modified so that it is possible to call the access functions (atomic and functional) without going through the port, and the memory is allowed to be unconnected, i.e. have no ports (since Ruby does not attach it like the conventional memory system). --- src/mem/ruby/system/Sequencer.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/mem/ruby/system/Sequencer.py') diff --git a/src/mem/ruby/system/Sequencer.py b/src/mem/ruby/system/Sequencer.py index b1e17e052..02686d33f 100644 --- a/src/mem/ruby/system/Sequencer.py +++ b/src/mem/ruby/system/Sequencer.py @@ -38,13 +38,12 @@ class RubyPort(MemObject): master = VectorMasterPort("CPU master port") version = Param.Int(0, "") pio_port = MasterPort("Ruby_pio_port") - physmem = Param.PhysicalMemory("") - physMemPort = MasterPort("port to physical memory") using_ruby_tester = Param.Bool(False, "") using_network_tester = Param.Bool(False, "") access_phys_mem = Param.Bool(True, "should the rubyport atomically update phys_mem") ruby_system = Param.RubySystem("") + system = Param.System(Parent.any, "system object") class RubyPortProxy(RubyPort): type = 'RubyPortProxy' -- cgit v1.2.3