From 2f30950143cc70bc42a3c8a4111d7cf8198ec881 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 11 May 2009 10:38:43 -0700 Subject: ruby: Import ruby and slicc from GEMS We eventually plan to replace the m5 cache hierarchy with the GEMS hierarchy, but for now we will make both live alongside eachother. --- src/mem/ruby/system/System.cc | 269 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 269 insertions(+) create mode 100644 src/mem/ruby/system/System.cc (limited to 'src/mem/ruby/system/System.cc') diff --git a/src/mem/ruby/system/System.cc b/src/mem/ruby/system/System.cc new file mode 100644 index 000000000..6352d8a58 --- /dev/null +++ b/src/mem/ruby/system/System.cc @@ -0,0 +1,269 @@ + +/* + * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * System.C + * + * Description: See System.h + * + * $Id$ + * + */ + + +#include "System.hh" +#include "Profiler.hh" +#include "Network.hh" +#include "Tester.hh" +#include "SyntheticDriver.hh" +#include "DeterministicDriver.hh" +#include "OpalInterface.hh" +#include "Chip.hh" +//#include "Tracer.hh" +#include "Protocol.hh" +//#include "XactIsolationChecker.hh" // gem5:Arka for decomissioning of log_tm +//#include "XactCommitArbiter.hh" +//#include "XactVisualizer.hh" +#include "M5Driver.hh" + +System::System() +{ + DEBUG_MSG(SYSTEM_COMP, MedPrio,"initializing"); + + m_driver_ptr = NULL; + m_profiler_ptr = new Profiler; + + // NETWORK INITIALIZATION + // create the network by calling a function that calls new + m_network_ptr = Network::createNetwork(RubyConfig::numberOfChips()); + + DEBUG_MSG(SYSTEM_COMP, MedPrio,"Constructed network"); + + // CHIP INITIALIZATION + m_chip_vector.setSize(RubyConfig::numberOfChips());// create the vector of pointers to processors + for(int i=0; iprintConfig(out); + m_network_ptr->printConfig(out); + m_driver_ptr->printConfig(out); + m_profiler_ptr->printConfig(out); + out << "\n================ End System Configuration Print ================\n\n"; +} + +void System::printStats(ostream& out) +{ + const time_t T = time(NULL); + tm *localTime = localtime(&T); + char buf[100]; + strftime(buf, 100, "%b/%d/%Y %H:%M:%S", localTime); + + out << "Real time: " << buf << endl; + + m_profiler_ptr->printStats(out); + for(int i=0; im_L1Cache_mandatoryQueue_vec[p]->printStats(out); + } + } + m_network_ptr->printStats(out); + m_driver_ptr->printStats(out); + Chip::printStats(out); +} + +void System::clearStats() const +{ + m_profiler_ptr->clearStats(); + m_network_ptr->clearStats(); + m_driver_ptr->clearStats(); + Chip::clearStats(); + for(int i=0; im_L1Cache_mandatoryQueue_vec[p]->clearStats(); + } + } +} + +void System::recordCacheContents(CacheRecorder& tr) const +{ + for (int i = 0; i < m_chip_vector.size(); i++) { + for (int m_version = 0; m_version < RubyConfig::numberOfProcsPerChip(); m_version++) { + if (Protocol::m_TwoLevelCache) { + m_chip_vector[i]->m_L1Cache_L1IcacheMemory_vec[m_version]->setAsInstructionCache(true); + m_chip_vector[i]->m_L1Cache_L1DcacheMemory_vec[m_version]->setAsInstructionCache(false); + } else { + m_chip_vector[i]->m_L1Cache_cacheMemory_vec[m_version]->setAsInstructionCache(false); + } + } + m_chip_vector[i]->recordCacheContents(tr); + } +} + +void System::opalLoadNotify() +{ + if (OpalInterface::isOpalLoaded()) { + // change the driver pointer to point to an opal driver + delete m_driver_ptr; + m_driver_ptr = new OpalInterface(this); + } +} + +#ifdef CHECK_COHERENCE +// This code will check for cases if the given cache block is exclusive in +// one node and shared in another-- a coherence violation +// +// To use, the SLICC specification must call sequencer.checkCoherence(address) +// when the controller changes to a state with new permissions. Do this +// in setState. The SLICC spec must also define methods "isBlockShared" +// and "isBlockExclusive" that are specific to that protocol +// +void System::checkGlobalCoherenceInvariant(const Address& addr ) { + + NodeID exclusive = -1; + bool sharedDetected = false; + NodeID lastShared = -1; + + for (int i = 0; i < m_chip_vector.size(); i++) { + + if (m_chip_vector[i]->isBlockExclusive(addr)) { + if (exclusive != -1) { + // coherence violation + WARN_EXPR(exclusive); + WARN_EXPR(m_chip_vector[i]->getID()); + WARN_EXPR(addr); + WARN_EXPR(g_eventQueue_ptr->getTime()); + ERROR_MSG("Coherence Violation Detected -- 2 exclusive chips"); + } + else if (sharedDetected) { + WARN_EXPR(lastShared); + WARN_EXPR(m_chip_vector[i]->getID()); + WARN_EXPR(addr); + WARN_EXPR(g_eventQueue_ptr->getTime()); + ERROR_MSG("Coherence Violation Detected -- exclusive chip with >=1 shared"); + } + else { + exclusive = m_chip_vector[i]->getID(); + } + } + else if (m_chip_vector[i]->isBlockShared(addr)) { + sharedDetected = true; + lastShared = m_chip_vector[i]->getID(); + + if (exclusive != -1) { + WARN_EXPR(lastShared); + WARN_EXPR(exclusive); + WARN_EXPR(addr); + WARN_EXPR(g_eventQueue_ptr->getTime()); + ERROR_MSG("Coherence Violation Detected -- exclusive chip with >=1 shared"); + } + } + } +} +#endif + + + + -- cgit v1.2.3 From ab5e4a22b3893fb0ccdfbf466d46983caeb5948e Mon Sep 17 00:00:00 2001 From: Daniel Sanchez Date: Mon, 11 May 2009 10:38:44 -0700 Subject: ruby: Removed System name clash by renaming ruby's System to RubySystem --- src/mem/ruby/system/System.cc | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) (limited to 'src/mem/ruby/system/System.cc') diff --git a/src/mem/ruby/system/System.cc b/src/mem/ruby/system/System.cc index 6352d8a58..74d4ef90f 100644 --- a/src/mem/ruby/system/System.cc +++ b/src/mem/ruby/system/System.cc @@ -28,9 +28,9 @@ */ /* - * System.C + * RubySystem.C * - * Description: See System.h + * Description: See RubySystem.h * * $Id$ * @@ -52,7 +52,7 @@ //#include "XactVisualizer.hh" #include "M5Driver.hh" -System::System() +RubySystem::RubySystem() { DEBUG_MSG(SYSTEM_COMP, MedPrio,"initializing"); @@ -129,7 +129,7 @@ System::System() } -System::~System() +RubySystem::~RubySystem() { for (int i = 0; i < m_chip_vector.size(); i++) { delete m_chip_vector[i]; @@ -142,19 +142,19 @@ System::~System() */ } -void System::printConfig(ostream& out) const +void RubySystem::printConfig(ostream& out) const { - out << "\n================ Begin System Configuration Print ================\n\n"; + out << "\n================ Begin RubySystem Configuration Print ================\n\n"; RubyConfig::printConfiguration(out); out << endl; getChip(0)->printConfig(out); m_network_ptr->printConfig(out); m_driver_ptr->printConfig(out); m_profiler_ptr->printConfig(out); - out << "\n================ End System Configuration Print ================\n\n"; + out << "\n================ End RubySystem Configuration Print ================\n\n"; } -void System::printStats(ostream& out) +void RubySystem::printStats(ostream& out) { const time_t T = time(NULL); tm *localTime = localtime(&T); @@ -174,7 +174,7 @@ void System::printStats(ostream& out) Chip::printStats(out); } -void System::clearStats() const +void RubySystem::clearStats() const { m_profiler_ptr->clearStats(); m_network_ptr->clearStats(); @@ -187,7 +187,7 @@ void System::clearStats() const } } -void System::recordCacheContents(CacheRecorder& tr) const +void RubySystem::recordCacheContents(CacheRecorder& tr) const { for (int i = 0; i < m_chip_vector.size(); i++) { for (int m_version = 0; m_version < RubyConfig::numberOfProcsPerChip(); m_version++) { @@ -220,7 +220,7 @@ void System::opalLoadNotify() // in setState. The SLICC spec must also define methods "isBlockShared" // and "isBlockExclusive" that are specific to that protocol // -void System::checkGlobalCoherenceInvariant(const Address& addr ) { +void RubySystem::checkGlobalCoherenceInvariant(const Address& addr ) { NodeID exclusive = -1; bool sharedDetected = false; -- cgit v1.2.3 From d8c592a05d884560b3cbbe04d9e1ed9cf6575eaa Mon Sep 17 00:00:00 2001 From: Dan Gibson Date: Mon, 11 May 2009 10:38:45 -0700 Subject: ruby: remove unnecessary code. 1) Removing files from the ruby build left some unresovled symbols. Those have been fixed. 2) Most of the dependencies on Simics data types and the simics interface files have been removed. 3) Almost all mention of opal is gone. 4) Huge chunks of LogTM are now gone. 5) Handling 1-4 left ~hundreds of unresolved references, which were fixed, yielding a snowball effect (and the massive size of this delta). --- src/mem/ruby/system/System.cc | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'src/mem/ruby/system/System.cc') diff --git a/src/mem/ruby/system/System.cc b/src/mem/ruby/system/System.cc index 74d4ef90f..a38809e94 100644 --- a/src/mem/ruby/system/System.cc +++ b/src/mem/ruby/system/System.cc @@ -43,7 +43,6 @@ #include "Tester.hh" #include "SyntheticDriver.hh" #include "DeterministicDriver.hh" -#include "OpalInterface.hh" #include "Chip.hh" //#include "Tracer.hh" #include "Protocol.hh" @@ -202,15 +201,6 @@ void RubySystem::recordCacheContents(CacheRecorder& tr) const } } -void System::opalLoadNotify() -{ - if (OpalInterface::isOpalLoaded()) { - // change the driver pointer to point to an opal driver - delete m_driver_ptr; - m_driver_ptr = new OpalInterface(this); - } -} - #ifdef CHECK_COHERENCE // This code will check for cases if the given cache block is exclusive in // one node and shared in another-- a coherence violation -- cgit v1.2.3 From 24da30e317cdbf4b628141d69b2d17dac5ae3822 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 11 May 2009 10:38:45 -0700 Subject: ruby: Make ruby #includes use full paths to the files they're including. This basically means changing all #include statements and changing autogenerated code so that it generates the correct paths. Because slicc generates #includes, I had to hard code the include paths to mem/protocol. --- src/mem/ruby/system/System.cc | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'src/mem/ruby/system/System.cc') diff --git a/src/mem/ruby/system/System.cc b/src/mem/ruby/system/System.cc index a38809e94..ae77d2a85 100644 --- a/src/mem/ruby/system/System.cc +++ b/src/mem/ruby/system/System.cc @@ -37,19 +37,19 @@ */ -#include "System.hh" -#include "Profiler.hh" -#include "Network.hh" -#include "Tester.hh" -#include "SyntheticDriver.hh" -#include "DeterministicDriver.hh" -#include "Chip.hh" -//#include "Tracer.hh" -#include "Protocol.hh" +#include "mem/ruby/system/System.hh" +#include "mem/ruby/profiler/Profiler.hh" +#include "mem/ruby/network/Network.hh" +#include "mem/ruby/tester/Tester.hh" +#include "mem/ruby/tester/SyntheticDriver.hh" +#include "mem/ruby/tester/DeterministicDriver.hh" +#include "mem/protocol/Chip.hh" +//#include "mem/ruby/recorder/Tracer.hh" +#include "mem/protocol/Protocol.hh" //#include "XactIsolationChecker.hh" // gem5:Arka for decomissioning of log_tm //#include "XactCommitArbiter.hh" //#include "XactVisualizer.hh" -#include "M5Driver.hh" +#include "mem/ruby/interfaces/M5Driver.hh" RubySystem::RubySystem() { -- cgit v1.2.3 From 93f2f69657d0a2420a2c86b71505e6d27e6e2a38 Mon Sep 17 00:00:00 2001 From: Daniel Sanchez Date: Mon, 11 May 2009 10:38:46 -0700 Subject: ruby: Working M5 interface and updated Ruby interface. This changeset also includes a lot of work from Derek Hower RubyMemory is now both a driver for Ruby and a port for M5. Changed makeRequest/hitCallback interface. Brought packets (superficially) into the sequencer. Modified tester infrastructure to be packet based. and Ruby can be used together through the example ruby_se.py script. SPARC parallel applications work, and the timing *seems* right from combined M5/Ruby debug traces. To run, % build/ALPHA_SE/m5.debug configs/example/ruby_se.py -c tests/test-progs/hello/bin/alpha/linux/hello -n 4 -t --- src/mem/ruby/system/System.cc | 79 ++++++++++++++++++++++++------------------- 1 file changed, 45 insertions(+), 34 deletions(-) (limited to 'src/mem/ruby/system/System.cc') diff --git a/src/mem/ruby/system/System.cc b/src/mem/ruby/system/System.cc index ae77d2a85..877a894fc 100644 --- a/src/mem/ruby/system/System.cc +++ b/src/mem/ruby/system/System.cc @@ -46,12 +46,48 @@ #include "mem/protocol/Chip.hh" //#include "mem/ruby/recorder/Tracer.hh" #include "mem/protocol/Protocol.hh" -//#include "XactIsolationChecker.hh" // gem5:Arka for decomissioning of log_tm -//#include "XactCommitArbiter.hh" -//#include "XactVisualizer.hh" -#include "mem/ruby/interfaces/M5Driver.hh" RubySystem::RubySystem() +{ + init(); + m_preinitialized_driver = false; + createDriver(); + + /* gem5:Binkert for decomissiong of tracer + m_tracer_ptr = new Tracer; + */ + + /* gem5:Arka for decomissiong of log_tm + if (XACT_MEMORY) { + m_xact_isolation_checker = new XactIsolationChecker; + m_xact_commit_arbiter = new XactCommitArbiter; + m_xact_visualizer = new XactVisualizer; + } +*/ +} + +RubySystem::RubySystem(Driver* _driver) +{ + init(); + m_preinitialized_driver = true; + m_driver_ptr = _driver; +} + +RubySystem::~RubySystem() +{ + for (int i = 0; i < m_chip_vector.size(); i++) { + delete m_chip_vector[i]; + } + if (!m_preinitialized_driver) + delete m_driver_ptr; + delete m_network_ptr; + delete m_profiler_ptr; + /* gem5:Binkert for decomissiong of tracer + delete m_tracer_ptr; + */ +} + +void RubySystem::init() { DEBUG_MSG(SYSTEM_COMP, MedPrio,"initializing"); @@ -101,44 +137,19 @@ RubySystem::RubySystem() } } #endif + DEBUG_MSG(SYSTEM_COMP, MedPrio,"finished initializing"); + DEBUG_NEWLINE(SYSTEM_COMP, MedPrio); +} +void RubySystem::createDriver() +{ if (g_SYNTHETIC_DRIVER && !g_DETERMINISTIC_DRIVER) { cerr << "Creating Synthetic Driver" << endl; m_driver_ptr = new SyntheticDriver(this); } else if (!g_SYNTHETIC_DRIVER && g_DETERMINISTIC_DRIVER) { cerr << "Creating Deterministic Driver" << endl; m_driver_ptr = new DeterministicDriver(this); - } else { - cerr << "Creating M5 Driver" << endl; - m_driver_ptr = new M5Driver(this); } - /* gem5:Binkert for decomissiong of tracer - m_tracer_ptr = new Tracer; - */ - - /* gem5:Arka for decomissiong of log_tm - if (XACT_MEMORY) { - m_xact_isolation_checker = new XactIsolationChecker; - m_xact_commit_arbiter = new XactCommitArbiter; - m_xact_visualizer = new XactVisualizer; - } -*/ - DEBUG_MSG(SYSTEM_COMP, MedPrio,"finished initializing"); - DEBUG_NEWLINE(SYSTEM_COMP, MedPrio); - -} - -RubySystem::~RubySystem() -{ - for (int i = 0; i < m_chip_vector.size(); i++) { - delete m_chip_vector[i]; - } - delete m_driver_ptr; - delete m_network_ptr; - delete m_profiler_ptr; - /* gem5:Binkert for decomissiong of tracer - delete m_tracer_ptr; - */ } void RubySystem::printConfig(ostream& out) const -- cgit v1.2.3