From 34fb6b5e35db751f310aee824046107e57a0ba03 Mon Sep 17 00:00:00 2001 From: Blake Hechtman Date: Mon, 20 Jul 2015 09:15:18 -0500 Subject: mem: misc flags for AMD gpu model This patch add support to mark memory requests/packets with attributes defined in HSA, such as memory order and scope. --- src/mem/ruby/common/DataBlock.hh | 1 - src/mem/ruby/slicc_interface/RubyRequest.hh | 70 +++++++++++++++++++++++++++-- src/mem/ruby/system/RubyPort.cc | 51 ++++++++++++--------- 3 files changed, 97 insertions(+), 25 deletions(-) (limited to 'src/mem/ruby') diff --git a/src/mem/ruby/common/DataBlock.hh b/src/mem/ruby/common/DataBlock.hh index ac08fac82..49ce3624a 100644 --- a/src/mem/ruby/common/DataBlock.hh +++ b/src/mem/ruby/common/DataBlock.hh @@ -60,7 +60,6 @@ class DataBlock const uint8_t *getData(int offset, int len) const; void setByte(int whichByte, uint8_t data); void setData(const uint8_t *data, int offset, int len); - void copyPartial(const DataBlock & dblk, int offset, int len); bool equal(const DataBlock& obj) const; void print(std::ostream& out) const; diff --git a/src/mem/ruby/slicc_interface/RubyRequest.hh b/src/mem/ruby/slicc_interface/RubyRequest.hh index b17269a78..73f214a20 100644 --- a/src/mem/ruby/slicc_interface/RubyRequest.hh +++ b/src/mem/ruby/slicc_interface/RubyRequest.hh @@ -30,12 +30,16 @@ #define __MEM_RUBY_SLICC_INTERFACE_RUBY_REQUEST_HH__ #include +#include +#include "mem/protocol/HSAScope.hh" +#include "mem/protocol/HSASegment.hh" #include "mem/protocol/Message.hh" #include "mem/protocol/PrefetchBit.hh" #include "mem/protocol/RubyAccessMode.hh" #include "mem/protocol/RubyRequestType.hh" #include "mem/ruby/common/Address.hh" +#include "mem/ruby/common/DataBlock.hh" class RubyRequest : public Message { @@ -50,11 +54,41 @@ class RubyRequest : public Message uint8_t* data; PacketPtr pkt; ContextID m_contextId; + int m_wfid; + HSAScope m_scope; + HSASegment m_segment; + RubyRequest(Tick curTime, uint64_t _paddr, uint8_t* _data, int _len, uint64_t _pc, RubyRequestType _type, RubyAccessMode _access_mode, PacketPtr _pkt, PrefetchBit _pb = PrefetchBit_No, - ContextID _proc_id = 100) + ContextID _proc_id = 100, ContextID _core_id = 99, + HSAScope _scope = HSAScope_UNSPECIFIED, + HSASegment _segment = HSASegment_GLOBAL) + : Message(curTime), + m_PhysicalAddress(_paddr), + m_Type(_type), + m_ProgramCounter(_pc), + m_AccessMode(_access_mode), + m_Size(_len), + m_Prefetch(_pb), + data(_data), + pkt(_pkt), + m_contextId(_core_id), + m_scope(_scope), + m_segment(_segment) + { + m_LineAddress = makeLineAddress(m_PhysicalAddress); + } + + RubyRequest(Tick curTime, uint64_t _paddr, uint8_t* _data, int _len, + uint64_t _pc, RubyRequestType _type, + RubyAccessMode _access_mode, PacketPtr _pkt, PrefetchBit _pb, + unsigned _proc_id, unsigned _core_id, + int _wm_size, std::vector & _wm_mask, + DataBlock & _Data, + HSAScope _scope = HSAScope_UNSPECIFIED, + HSASegment _segment = HSASegment_GLOBAL) : Message(curTime), m_PhysicalAddress(_paddr), m_Type(_type), @@ -64,11 +98,41 @@ class RubyRequest : public Message m_Prefetch(_pb), data(_data), pkt(_pkt), - m_contextId(_proc_id) + m_contextId(_core_id), + m_wfid(_proc_id), + m_scope(_scope), + m_segment(_segment) { - m_LineAddress = makeLineAddress(m_PhysicalAddress); + m_LineAddress = makeLineAddress(m_PhysicalAddress); } + RubyRequest(Tick curTime, uint64_t _paddr, uint8_t* _data, int _len, + uint64_t _pc, RubyRequestType _type, + RubyAccessMode _access_mode, PacketPtr _pkt, PrefetchBit _pb, + unsigned _proc_id, unsigned _core_id, + int _wm_size, std::vector & _wm_mask, + DataBlock & _Data, + std::vector< std::pair > _atomicOps, + HSAScope _scope = HSAScope_UNSPECIFIED, + HSASegment _segment = HSASegment_GLOBAL) + : Message(curTime), + m_PhysicalAddress(_paddr), + m_Type(_type), + m_ProgramCounter(_pc), + m_AccessMode(_access_mode), + m_Size(_len), + m_Prefetch(_pb), + data(_data), + pkt(_pkt), + m_contextId(_core_id), + m_wfid(_proc_id), + m_scope(_scope), + m_segment(_segment) + { + m_LineAddress = makeLineAddress(m_PhysicalAddress); + } + + RubyRequest(Tick curTime) : Message(curTime) {} MsgPtr clone() const { return std::shared_ptr(new RubyRequest(*this)); } diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc index 52acaf8c3..5a5f528bb 100644 --- a/src/mem/ruby/system/RubyPort.cc +++ b/src/mem/ruby/system/RubyPort.cc @@ -237,25 +237,27 @@ RubyPort::MemSlavePort::recvTimingReq(PacketPtr pkt) // Check for pio requests and directly send them to the dedicated // pio port. - if (!isPhysMemAddress(pkt->getAddr())) { - assert(ruby_port->memMasterPort.isConnected()); - DPRINTF(RubyPort, "Request address %#x assumed to be a pio address\n", - pkt->getAddr()); - - // Save the port in the sender state object to be used later to - // route the response - pkt->pushSenderState(new SenderState(this)); + if (pkt->cmd != MemCmd::MemFenceReq) { + if (!isPhysMemAddress(pkt->getAddr())) { + assert(ruby_port->memMasterPort.isConnected()); + DPRINTF(RubyPort, "Request address %#x assumed to be a " + "pio address\n", pkt->getAddr()); + + // Save the port in the sender state object to be used later to + // route the response + pkt->pushSenderState(new SenderState(this)); + + // send next cycle + RubySystem *rs = ruby_port->m_ruby_system; + ruby_port->memMasterPort.schedTimingReq(pkt, + curTick() + rs->clockPeriod()); + return true; + } - // send next cycle - RubySystem *rs = ruby_port->m_ruby_system; - ruby_port->memMasterPort.schedTimingReq(pkt, - curTick() + rs->clockPeriod()); - return true; + assert(getOffset(pkt->getAddr()) + pkt->getSize() <= + RubySystem::getBlockSizeBytes()); } - assert(getOffset(pkt->getAddr()) + pkt->getSize() <= - RubySystem::getBlockSizeBytes()); - // Submit the ruby request RequestStatus requestStatus = ruby_port->makeRequest(pkt); @@ -272,9 +274,11 @@ RubyPort::MemSlavePort::recvTimingReq(PacketPtr pkt) return true; } - - DPRINTF(RubyPort, "Request for address %#x did not issued because %s\n", - pkt->getAddr(), RequestStatus_to_string(requestStatus)); + if (pkt->cmd != MemCmd::MemFenceReq) { + DPRINTF(RubyPort, + "Request for address %#x did not issued because %s\n", + pkt->getAddr(), RequestStatus_to_string(requestStatus)); + } addToRetryList(); @@ -466,9 +470,14 @@ RubyPort::MemSlavePort::hitCallback(PacketPtr pkt) } } - // Flush requests don't access physical memory - if (pkt->isFlush()) { + // Flush, acquire, release requests don't access physical memory + if (pkt->isFlush() || pkt->cmd == MemCmd::MemFenceReq) { + accessPhysMem = false; + } + + if (pkt->req->isKernel()) { accessPhysMem = false; + needsResponse = true; } DPRINTF(RubyPort, "Hit callback needs response %d\n", needsResponse); -- cgit v1.2.3