From dd95bc4d44d124abec3580f95db725895027bd1c Mon Sep 17 00:00:00 2001 From: Korey Sewell Date: Mon, 2 May 2011 00:16:14 -0400 Subject: ruby: dbg: use system ticks instead of cycles --- src/mem/ruby/buffers/MessageBuffer.cc | 14 ++++++++------ src/mem/ruby/network/simple/PerfectSwitch.cc | 5 ++--- src/mem/ruby/system/Sequencer.cc | 14 +++++++------- 3 files changed, 17 insertions(+), 16 deletions(-) (limited to 'src/mem/ruby') diff --git a/src/mem/ruby/buffers/MessageBuffer.cc b/src/mem/ruby/buffers/MessageBuffer.cc index e5df19cab..9bb166e05 100644 --- a/src/mem/ruby/buffers/MessageBuffer.cc +++ b/src/mem/ruby/buffers/MessageBuffer.cc @@ -126,8 +126,7 @@ MessageBuffer::getMsgPtrCopy() const const Message* MessageBuffer::peekAtHeadOfQueue() const { - DPRINTF(RubyQueue, "Peeking at head of queue time: %lld\n", - g_eventQueue_ptr->getTime()); + DPRINTF(RubyQueue, "Peeking at head of queue.\n"); assert(isReady()); const Message* msg_ptr = m_prio_heap.front().m_msgptr.get(); @@ -196,8 +195,11 @@ MessageBuffer::enqueue(MsgPtr message, Time delta) if (arrival_time < m_last_arrival_time) { panic("FIFO ordering violated: %s name: %s current time: %d " "delta: %d arrival_time: %d last arrival_time: %d\n", - *this, m_name, current_time, delta, arrival_time, - m_last_arrival_time); + *this, m_name, + current_time * g_eventQueue_ptr->getClock(), + delta * g_eventQueue_ptr->getClock(), + arrival_time * g_eventQueue_ptr->getClock(), + m_last_arrival_time * g_eventQueue_ptr->getClock()); } } m_last_arrival_time = arrival_time; @@ -220,8 +222,8 @@ MessageBuffer::enqueue(MsgPtr message, Time delta) push_heap(m_prio_heap.begin(), m_prio_heap.end(), greater()); - DPRINTF(RubyQueue, "Enqueue with arrival_time %lld (cur_time: %lld).\n", - arrival_time, g_eventQueue_ptr->getTime()); + DPRINTF(RubyQueue, "Enqueue with arrival_time %lld.\n", + arrival_time * g_eventQueue_ptr->getClock()); DPRINTF(RubyQueue, "Enqueue Message: %s.\n", (*(message.get()))); // Schedule the wakeup diff --git a/src/mem/ruby/network/simple/PerfectSwitch.cc b/src/mem/ruby/network/simple/PerfectSwitch.cc index a054cee89..3c35be217 100644 --- a/src/mem/ruby/network/simple/PerfectSwitch.cc +++ b/src/mem/ruby/network/simple/PerfectSwitch.cc @@ -302,9 +302,8 @@ PerfectSwitch::wakeup() // Enqeue msg DPRINTF(RubyNetwork, "Enqueuing net msg from " - "inport[%d][%d] to outport [%d][%d] time: %lld.\n", - incoming, vnet, outgoing, vnet, - g_eventQueue_ptr->getTime()); + "inport[%d][%d] to outport [%d][%d].\n", + incoming, vnet, outgoing, vnet); m_out[outgoing][vnet]->enqueue(msg_ptr); } diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc index e260ce865..1b46e680d 100644 --- a/src/mem/ruby/system/Sequencer.cc +++ b/src/mem/ruby/system/Sequencer.cc @@ -500,10 +500,10 @@ Sequencer::hitCallback(SequencerRequest* srequest, g_eventQueue_ptr->getTime()); } - DPRINTFR(ProtocolTrace, "%7s %3s %10s%20s %6s>%-6s %s %d cycles\n", - g_eventQueue_ptr->getTime(), m_version, "Seq", - success ? "Done" : "SC_Failed", "", "", - ruby_request.m_PhysicalAddress, miss_latency); + DPRINTFR(ProtocolTrace, "%15s %3s %10s%20s %6s>%-6s %s %d cycles\n", + curTick(), m_version, "Seq", + success ? "Done" : "SC_Failed", "", "", + ruby_request.m_PhysicalAddress, miss_latency); } #if 0 if (request.getPrefetch() == PrefetchBit_Yes) { @@ -685,9 +685,9 @@ Sequencer::issueRequest(const RubyRequest& request) ctype, amtype, request.pkt, PrefetchBit_No, proc_id); - DPRINTFR(ProtocolTrace, "%7s %3s %10s%20s %6s>%-6s %s %s\n", - g_eventQueue_ptr->getTime(), m_version, "Seq", "Begin", "", "", - request.m_PhysicalAddress, RubyRequestType_to_string(request.m_Type)); + DPRINTFR(ProtocolTrace, "%15s %3s %10s%20s %6s>%-6s %s %s\n", + curTick(), m_version, "Seq", "Begin", "", "", + request.m_PhysicalAddress, RubyRequestType_to_string(request.m_Type)); Time latency = 0; // initialzed to an null value -- cgit v1.2.3