From 26ac28dec288e4fd96d999267ec7cafad4d58c5a Mon Sep 17 00:00:00 2001
From: Alexandru <alexandru.dutu@amd.com>
Date: Tue, 1 Apr 2014 12:18:12 -0500
Subject: mem: adding a multi-level page table class This patch defines a
 multi-level page table class that stores the page table in system memory,
 consistent with ISA specifications. In this way, cpu models that use the
 actual hardware to execute (e.g. KvmCPU), are able to traverse the page
 table.

---
 src/mem/se_translating_port_proxy.hh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/mem/se_translating_port_proxy.hh')

diff --git a/src/mem/se_translating_port_proxy.hh b/src/mem/se_translating_port_proxy.hh
index c0e522611..99973a6e9 100644
--- a/src/mem/se_translating_port_proxy.hh
+++ b/src/mem/se_translating_port_proxy.hh
@@ -75,7 +75,7 @@ class SETranslatingPortProxy : public PortProxy
     };
 
   private:
-    PageTable *pTable;
+    PageTableBase *pTable;
     Process *process;
     AllocType allocating;
 
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