From ee6b41a1e41656b15f9f77bff5effbba27133603 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Fri, 1 Nov 2013 11:56:24 -0400 Subject: mem: Add tRRD as a timing parameter for the DRAM controller This patch adds the tRRD parameter to the DRAM controller. With the recent addition of the actAllowedAt member for each bank, this addition is trivial. --- src/mem/simple_dram.hh | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/mem/simple_dram.hh') diff --git a/src/mem/simple_dram.hh b/src/mem/simple_dram.hh index c97f70e1d..dfb8fc15f 100644 --- a/src/mem/simple_dram.hh +++ b/src/mem/simple_dram.hh @@ -420,7 +420,7 @@ class SimpleDRAM : public AbstractMemory * method updates the time that the banks become available based * on the current limits. */ - void recordActivate(Tick act_tick, uint8_t rank); + void recordActivate(Tick act_tick, uint8_t rank, uint8_t bank); void printParams() const; void printQs() const; @@ -487,6 +487,7 @@ class SimpleDRAM : public AbstractMemory const Tick tRAS; const Tick tRFC; const Tick tREFI; + const Tick tRRD; const Tick tXAW; const uint32_t activationLimit; -- cgit v1.2.3