From cb7782f78d337527d8ea3d593645fc67cca54d23 Mon Sep 17 00:00:00 2001 From: Nilay Vaish Date: Sun, 10 Feb 2013 21:43:17 -0600 Subject: ruby: enable multiple clock domains This patch allows ruby to have multiple clock domains. As I understand with this patch, controllers can have different frequencies. The entire network needs to run at a single frequency. The idea is that with in an object, time is treated in terms of cycles. But the messages that are passed from one entity to another should contain the time in Ticks. As of now, this is only true for the message buffers, but not for the links in the network. As I understand the code, all the entities in different networks (simple, garnet-fixed, garnet-flexible) should be clocked at the same frequency. Another problem is that the directory controller has to operate at the same frequency as the ruby system. This is because the memory controller does not make use of the Message Buffer, and instead implements a buffer of its own. So, it has no idea of the frequency at which the directory controller is operating and uses ruby system's frequency for scheduling events. --- src/mem/slicc/symbols/StateMachine.py | 25 +++++++++++++++++++------ src/mem/slicc/symbols/Type.py | 4 ++-- 2 files changed, 21 insertions(+), 8 deletions(-) (limited to 'src/mem/slicc/symbols') diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py index e66743255..ddaa3e440 100644 --- a/src/mem/slicc/symbols/StateMachine.py +++ b/src/mem/slicc/symbols/StateMachine.py @@ -518,7 +518,10 @@ m_dma_sequencer_ptr->setController(this); code('m_num_controllers++;') for var in self.objects: if var.ident.find("mandatoryQueue") >= 0: - code('m_${{var.c_ident}}_ptr = new ${{var.type.c_ident}}();') + code(''' +m_${{var.c_ident}}_ptr = new ${{var.type.c_ident}}(); +m_${{var.c_ident}}_ptr->setReceiver(this); +''') code.dedent() code(''' @@ -573,7 +576,7 @@ $c_ident::init() code('*$vid = ${{vtype["default"]}}; // $comment') # Set ordering - if "ordered" in var and "trigger_queue" not in var: + if "ordered" in var: # A buffer code('$vid->setOrdering(${{var["ordered"]}});') @@ -583,10 +586,16 @@ $c_ident::init() code('$vid->setRandomization(${{var["random"]}});') # Set Priority - if vtype.isBuffer and \ - "rank" in var and "trigger_queue" not in var: + if vtype.isBuffer and "rank" in var: code('$vid->setPriority(${{var["rank"]}});') + # Set sender and receiver for trigger queue + if var.ident.find("triggerQueue") >= 0: + code('$vid->setSender(this);') + code('$vid->setReceiver(this);') + elif vtype.c_ident == "TimerTable": + code('$vid->setClockObj(this);') + else: # Network port object network = var["network"] @@ -601,6 +610,12 @@ $vid = m_net_ptr->get${network}NetQueue(m_version + base, $ordered, $vnet, "$vne code('assert($vid != NULL);') + # Set the end + if network == "To": + code('$vid->setSender(this);') + else: + code('$vid->setReceiver(this);') + # Set ordering if "ordered" in var: # A buffer @@ -647,8 +662,6 @@ $vid->setDescription("[Version " + to_string(m_version) + ", ${ident}, name=${{v code('${{port.code}}.setConsumer(this);') # Set the queue descriptions code('${{port.code}}.setDescription("[Version " + to_string(m_version) + ", $ident, $port]");') - # Set the clock object - code('${{port.code}}.setClockObj(this);') # Initialize the transition profiling code() diff --git a/src/mem/slicc/symbols/Type.py b/src/mem/slicc/symbols/Type.py index f40036e8e..6ee48ba8b 100644 --- a/src/mem/slicc/symbols/Type.py +++ b/src/mem/slicc/symbols/Type.py @@ -246,7 +246,7 @@ $klass ${{self.c_ident}}$parent ''', klass="class") if self.isMessage: - code('(Cycles curTime) : %s(curTime) {' % self["interface"]) + code('(Tick curTime) : %s(curTime) {' % self["interface"]) else: code('()\n\t\t{') @@ -291,7 +291,7 @@ $klass ${{self.c_ident}}$parent params = ', '.join(params) if self.isMessage: - params = "const Cycles curTime, " + params + params = "const Tick curTime, " + params code('${{self.c_ident}}($params)') -- cgit v1.2.3