From 0ebbf3f9512609c089257158abd14b9366b72b52 Mon Sep 17 00:00:00 2001
From: Andreas Hansson <andreas.hansson@arm.com>
Date: Tue, 5 May 2015 03:22:24 -0400
Subject: mem: Add missing stats update for uncacheable MSHRs

This patch adds a missing counter update for the uncacheable
accesses. By updating this counter we also get a meaningful average
latency for uncacheable accesses (previously inf).
---
 src/mem/cache/cache_impl.hh | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

(limited to 'src/mem')

diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index a530001ae..6817db41e 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -701,8 +701,10 @@ Cache::recvTimingReq(PacketPtr pkt)
             }
         } else {
             // no MSHR
-            if (!pkt->req->isUncacheable()) {
-                assert(pkt->req->masterId() < system->maxMasters());
+            assert(pkt->req->masterId() < system->maxMasters());
+            if (pkt->req->isUncacheable()) {
+                mshr_uncacheable[pkt->cmdToIndex()][pkt->req->masterId()]++;
+            } else {
                 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++;
             }
 
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