From 319443d42dbed8d6b07b8a2b7a0e565ff5bd8abf Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Tue, 19 Feb 2013 05:56:07 -0500 Subject: scons: Add warning for missing declarations This patch enables warnings for missing declarations. To avoid issues with SWIG-generated code, the warning is only applied to non-SWIG code. --- src/mem/ruby/buffers/MessageBuffer.hh | 2 ++ src/mem/ruby/network/simple/PerfectSwitch.hh | 2 ++ src/mem/ruby/profiler/AddressProfiler.hh | 8 ++++++++ src/mem/ruby/system/CacheMemory.hh | 2 ++ src/mem/ruby/system/RubyMemoryControl.hh | 2 ++ src/mem/ruby/system/WireBuffer.hh | 2 ++ 6 files changed, 18 insertions(+) (limited to 'src/mem') diff --git a/src/mem/ruby/buffers/MessageBuffer.hh b/src/mem/ruby/buffers/MessageBuffer.hh index 74023a8ac..2a52d2a2e 100644 --- a/src/mem/ruby/buffers/MessageBuffer.hh +++ b/src/mem/ruby/buffers/MessageBuffer.hh @@ -216,6 +216,8 @@ class MessageBuffer int m_vnet_id; }; +Cycles random_time(); + inline std::ostream& operator<<(std::ostream& out, const MessageBuffer& obj) { diff --git a/src/mem/ruby/network/simple/PerfectSwitch.hh b/src/mem/ruby/network/simple/PerfectSwitch.hh index 695c848bc..2f914f39b 100644 --- a/src/mem/ruby/network/simple/PerfectSwitch.hh +++ b/src/mem/ruby/network/simple/PerfectSwitch.hh @@ -53,6 +53,8 @@ struct LinkOrder int m_value; }; +bool operator<(const LinkOrder& l1, const LinkOrder& l2); + class PerfectSwitch : public Consumer { public: diff --git a/src/mem/ruby/profiler/AddressProfiler.hh b/src/mem/ruby/profiler/AddressProfiler.hh index 5bce34bbb..642b5a41a 100644 --- a/src/mem/ruby/profiler/AddressProfiler.hh +++ b/src/mem/ruby/profiler/AddressProfiler.hh @@ -92,6 +92,14 @@ class AddressProfiler int m_num_of_sequencers; }; +AccessTraceForAddress& lookupTraceForAddress(const Address& addr, + AddressProfiler::AddressMap& + record_map); + +void printSorted(std::ostream& out, int num_of_sequencers, + const AddressProfiler::AddressMap &record_map, + std::string description); + inline std::ostream& operator<<(std::ostream& out, const AddressProfiler& obj) { diff --git a/src/mem/ruby/system/CacheMemory.hh b/src/mem/ruby/system/CacheMemory.hh index 6b436082f..8aca250b3 100644 --- a/src/mem/ruby/system/CacheMemory.hh +++ b/src/mem/ruby/system/CacheMemory.hh @@ -170,4 +170,6 @@ class CacheMemory : public SimObject bool m_resource_stalls; }; +std::ostream& operator<<(std::ostream& out, const CacheMemory& obj); + #endif // __MEM_RUBY_SYSTEM_CACHEMEMORY_HH__ diff --git a/src/mem/ruby/system/RubyMemoryControl.hh b/src/mem/ruby/system/RubyMemoryControl.hh index 68ef054e3..d0dfa5b8d 100644 --- a/src/mem/ruby/system/RubyMemoryControl.hh +++ b/src/mem/ruby/system/RubyMemoryControl.hh @@ -168,4 +168,6 @@ class RubyMemoryControl : public MemoryControl MemCntrlProfiler* m_profiler_ptr; }; +std::ostream& operator<<(std::ostream& out, const RubyMemoryControl& obj); + #endif // __MEM_RUBY_SYSTEM_MEMORY_CONTROL_HH__ diff --git a/src/mem/ruby/system/WireBuffer.hh b/src/mem/ruby/system/WireBuffer.hh index d71bf4520..3a8804798 100644 --- a/src/mem/ruby/system/WireBuffer.hh +++ b/src/mem/ruby/system/WireBuffer.hh @@ -100,4 +100,6 @@ class WireBuffer : public SimObject }; +std::ostream& operator<<(std::ostream& out, const WireBuffer& obj); + #endif // __MEM_RUBY_SYSTEM_WireBuffer_HH__ -- cgit v1.2.3