From b26355daa87c7a86a96a90b2002bc5684741288c Mon Sep 17 00:00:00 2001 From: Kevin Lim Date: Tue, 31 Oct 2006 13:59:30 -0500 Subject: Ports now have a pointer to the MemObject that owns it (can be NULL). src/cpu/simple/atomic.hh: Port now takes in the MemObject that owns it. src/cpu/simple/timing.hh: Port now takes in MemObject that owns it. src/dev/io_device.cc: src/mem/bus.hh: Ports now take in the MemObject that owns it. src/mem/cache/base_cache.cc: Ports now take in the MemObject that own it. src/mem/port.hh: src/mem/tport.hh: Ports now optionally take in the MemObject that owns it. --HG-- extra : convert_revision : 890a72a871795987c2236c65937e06973412d349 --- src/mem/bus.hh | 2 +- src/mem/cache/base_cache.cc | 2 +- src/mem/port.hh | 31 ++++++++++++++++++++----------- src/mem/tport.hh | 4 ++-- 4 files changed, 24 insertions(+), 15 deletions(-) (limited to 'src/mem') diff --git a/src/mem/bus.hh b/src/mem/bus.hh index 9fb33b7c3..7ec7e6830 100644 --- a/src/mem/bus.hh +++ b/src/mem/bus.hh @@ -144,7 +144,7 @@ class Bus : public MemObject /** Constructor for the BusPort.*/ BusPort(const std::string &_name, Bus *_bus, int _id) - : Port(_name), _onRetryList(false), bus(_bus), id(_id) + : Port(_name, _bus), _onRetryList(false), bus(_bus), id(_id) { } bool onRetryList() diff --git a/src/mem/cache/base_cache.cc b/src/mem/cache/base_cache.cc index 599958222..47d40a490 100644 --- a/src/mem/cache/base_cache.cc +++ b/src/mem/cache/base_cache.cc @@ -42,7 +42,7 @@ using namespace std; BaseCache::CachePort::CachePort(const std::string &_name, BaseCache *_cache, bool _isCpuSide) - : Port(_name), cache(_cache), isCpuSide(_isCpuSide) + : Port(_name, _cache), cache(_cache), isCpuSide(_isCpuSide) { blocked = false; waitingOnRetry = false; diff --git a/src/mem/port.hh b/src/mem/port.hh index b6eeb9db3..75afc04e6 100644 --- a/src/mem/port.hh +++ b/src/mem/port.hh @@ -58,6 +58,8 @@ typedef std::list > AddrRangeList; typedef std::list >::iterator AddrRangeIter; +class MemObject; + /** * Ports are used to interface memory objects to * each other. They will always come in pairs, and we refer to the other @@ -81,10 +83,13 @@ class Port memory objects. */ Port *peer; + /** A pointer to the MemObject that owns this port. This may not be set. */ + MemObject *owner; + public: Port() - : peer(NULL) + : peer(NULL), owner(NULL) { } /** @@ -92,9 +97,11 @@ class Port * * @param _name Port name for DPRINTF output. Should include name * of memory system object to which the port belongs. + * @param _owner Pointer to the MemObject that owns this port. + * Will not necessarily be set. */ - Port(const std::string &_name) - : portName(_name), peer(NULL) + Port(const std::string &_name, MemObject *_owner = NULL) + : portName(_name), peer(NULL), owner(_owner) { } /** Return port name (for DPRINTF). */ @@ -112,16 +119,18 @@ class Port void setName(const std::string &name) { portName = name; } - /** Function to set the pointer for the peer port. - @todo should be called by the configuration stuff (python). - */ + /** Function to set the pointer for the peer port. */ void setPeer(Port *port); - /** Function to set the pointer for the peer port. - @todo should be called by the configuration stuff (python). - */ + /** Function to get the pointer to the peer port. */ Port *getPeer() { return peer; } + /** Function to set the owner of this port. */ + void setOwner(MemObject *_owner) { owner = _owner; } + + /** Function to return the owner of this port. */ + MemObject *getOwner() { return owner; } + protected: /** These functions are protected because they should only be @@ -247,8 +256,8 @@ class Port class FunctionalPort : public Port { public: - FunctionalPort(const std::string &_name) - : Port(_name) + FunctionalPort(const std::string &_name, MemObject *_owner = NULL) + : Port(_name, _owner) {} protected: diff --git a/src/mem/tport.hh b/src/mem/tport.hh index fbe81c443..b419b7c7f 100644 --- a/src/mem/tport.hh +++ b/src/mem/tport.hh @@ -117,8 +117,8 @@ class SimpleTimingPort : public Port public: - SimpleTimingPort(std::string pname) - : Port(pname), outTiming(0), drainEvent(NULL) + SimpleTimingPort(std::string pname, MemObject *_owner = NULL) + : Port(pname, _owner), outTiming(0), drainEvent(NULL) {} /** Hook for draining timing accesses from the system. The -- cgit v1.2.3